field_val        1112 drivers/gpu/drm/amd/amdgpu/amdgpu.h #define REG_SET_FIELD(orig_val, reg, field, field_val)			\
field_val        1114 drivers/gpu/drm/amd/amdgpu/amdgpu.h 	 (REG_FIELD_MASK(reg, field) & ((field_val) << REG_FIELD_SHIFT(reg, field))))
field_val         268 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h 			uint32_t field_val, uint32_t mask, bool check_changed);
field_val         402 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 	uint32_t data, def, field_val;
field_val         406 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 		field_val = enable ? 0 : 1;
field_val         408 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 				     DBUS_MUX_CLK_SOFT_OVERRIDE, field_val);
field_val         410 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 				     OSSSYS_SHARE_CLK_SOFT_OVERRIDE, field_val);
field_val         412 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 				     LIMIT_SMN_CLK_SOFT_OVERRIDE, field_val);
field_val         414 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 				     DYN_CLK_SOFT_OVERRIDE, field_val);
field_val         416 drivers/gpu/drm/amd/amdgpu/navi10_ih.c 				     REG_CLK_SOFT_OVERRIDE, field_val);
field_val         124 drivers/gpu/drm/amd/include/cgs_common.h #define CGS_REG_SET_FIELD(orig_val, reg, field, field_val)			\
field_val         126 drivers/gpu/drm/amd/include/cgs_common.h 	 (CGS_REG_FIELD_MASK(reg, field) & ((field_val) << CGS_REG_FIELD_SHIFT(reg, field))))