field_ddc_start   212 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct reg_field	field_ddc_start;
field_ddc_start   272 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct regmap_field	*field_ddc_start;
field_ddc_start   356 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_start	= REG_FIELD(SUN4I_HDMI_DDC_CTRL_REG, 30, 30),
field_ddc_start   407 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_start	= REG_FIELD(SUN4I_HDMI_DDC_CTRL_REG, 30, 30),
field_ddc_start   464 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_start	= REG_FIELD(SUN6I_HDMI_DDC_CTRL_REG, 27, 27),
field_ddc_start   121 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	regmap_field_write(hdmi->field_ddc_start, 1);
field_ddc_start   132 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (regmap_field_read_poll_timeout(hdmi->field_ddc_start,
field_ddc_start   206 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	hdmi->field_ddc_start =
field_ddc_start   208 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 					hdmi->variant->field_ddc_start);
field_ddc_start   209 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (IS_ERR(hdmi->field_ddc_start))
field_ddc_start   210 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 		return PTR_ERR(hdmi->field_ddc_start);