field_ddc_int_status  217 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct reg_field	field_ddc_int_status;
field_ddc_int_status  277 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct regmap_field	*field_ddc_int_status;
field_ddc_int_status  360 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_int_status	= REG_FIELD(SUN4I_HDMI_DDC_INT_STATUS_REG, 0, 8),
field_ddc_int_status  411 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_int_status	= REG_FIELD(SUN4I_HDMI_DDC_INT_STATUS_REG, 0, 8),
field_ddc_int_status  468 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_int_status	= REG_FIELD(SUN6I_HDMI_DDC_INT_STATUS_REG, 0, 8),
field_ddc_int_status   50 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg,
field_ddc_int_status   64 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	regmap_field_force_write(hdmi->field_ddc_int_status,
field_ddc_int_status  115 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	regmap_field_force_write(hdmi->field_ddc_int_status,
field_ddc_int_status  137 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	regmap_field_read(hdmi->field_ddc_int_status, &reg);
field_ddc_int_status  236 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	hdmi->field_ddc_int_status =
field_ddc_int_status  238 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 					hdmi->variant->field_ddc_int_status);
field_ddc_int_status  239 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (IS_ERR(hdmi->field_ddc_int_status))
field_ddc_int_status  240 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 		return PTR_ERR(hdmi->field_ddc_int_status);