field_ddc_fifo_clear  218 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct reg_field	field_ddc_fifo_clear;
field_ddc_fifo_clear  278 drivers/gpu/drm/sun4i/sun4i_hdmi.h 	struct regmap_field	*field_ddc_fifo_clear;
field_ddc_fifo_clear  361 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_fifo_clear	= REG_FIELD(SUN4I_HDMI_DDC_FIFO_CTRL_REG, 31, 31),
field_ddc_fifo_clear  412 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_fifo_clear	= REG_FIELD(SUN4I_HDMI_DDC_FIFO_CTRL_REG, 31, 31),
field_ddc_fifo_clear  469 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c 	.field_ddc_fifo_clear	= REG_FIELD(SUN6I_HDMI_DDC_FIFO_CTRL_REG, 18, 18),
field_ddc_fifo_clear  100 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	regmap_field_write(hdmi->field_ddc_fifo_clear, 1);
field_ddc_fifo_clear  101 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (regmap_field_read_poll_timeout(hdmi->field_ddc_fifo_clear,
field_ddc_fifo_clear  242 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	hdmi->field_ddc_fifo_clear =
field_ddc_fifo_clear  244 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 					hdmi->variant->field_ddc_fifo_clear);
field_ddc_fifo_clear  245 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 	if (IS_ERR(hdmi->field_ddc_fifo_clear))
field_ddc_fifo_clear  246 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c 		return PTR_ERR(hdmi->field_ddc_fifo_clear);