field_ddc_addr_reg 214 drivers/gpu/drm/sun4i/sun4i_hdmi.h struct reg_field field_ddc_addr_reg; field_ddc_addr_reg 274 drivers/gpu/drm/sun4i/sun4i_hdmi.h struct regmap_field *field_ddc_addr_reg; field_ddc_addr_reg 358 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c .field_ddc_addr_reg = REG_FIELD(SUN4I_HDMI_DDC_ADDR_REG, 0, 31), field_ddc_addr_reg 409 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c .field_ddc_addr_reg = REG_FIELD(SUN4I_HDMI_DDC_ADDR_REG, 0, 31), field_ddc_addr_reg 466 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c .field_ddc_addr_reg = REG_FIELD(SUN6I_HDMI_DDC_ADDR_REG, 1, 31), field_ddc_addr_reg 86 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c regmap_field_write(hdmi->field_ddc_addr_reg, 0); field_ddc_addr_reg 218 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c hdmi->field_ddc_addr_reg = field_ddc_addr_reg 220 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c hdmi->variant->field_ddc_addr_reg); field_ddc_addr_reg 221 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c if (IS_ERR(hdmi->field_ddc_addr_reg)) field_ddc_addr_reg 222 drivers/gpu/drm/sun4i/sun4i_hdmi_i2c.c return PTR_ERR(hdmi->field_ddc_addr_reg);