fg_alpha          100 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c 	u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
fg_alpha          113 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c 	const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16);
fg_alpha          119 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c 	u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op)
fg_alpha          131 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c 	DPU_REG_WRITE(c, LM_BLEND0_FG_ALPHA + stage_off, fg_alpha);
fg_alpha           43 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h 		uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
fg_alpha          225 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 	uint32_t blend_op, fg_alpha, bg_alpha, ctl_blend_flags = 0;
fg_alpha          295 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		fg_alpha = pstates[i]->alpha;
fg_alpha          303 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 		DBG("Stage %d fg_alpha %x bg_alpha %x", i, fg_alpha, bg_alpha);
fg_alpha          308 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			if (fg_alpha != 0xff) {
fg_alpha          309 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				bg_alpha = fg_alpha;
fg_alpha          319 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 			if (fg_alpha != 0xff) {
fg_alpha          320 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				bg_alpha = fg_alpha;
fg_alpha          334 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 				blender(i)), fg_alpha);
fg_alpha          341 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c 					blender(i)), fg_alpha);