fence_size 268 drivers/gpu/drm/i915/gem/i915_gem_tiling.c vma->fence_size = fence_size 1031 drivers/gpu/drm/i915/i915_gem.c vma->fence_size > dev_priv->ggtt.mappable_end / 2) fence_size 86 drivers/gpu/drm/i915/i915_gem_fence_reg.c GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I965_FENCE_PAGE)); fence_size 89 drivers/gpu/drm/i915/i915_gem_fence_reg.c val = (vma->node.start + vma->fence_size - I965_FENCE_PAGE) << 32; fence_size 132 drivers/gpu/drm/i915/i915_gem_fence_reg.c GEM_BUG_ON(!is_power_of_2(vma->fence_size)); fence_size 133 drivers/gpu/drm/i915/i915_gem_fence_reg.c GEM_BUG_ON(!IS_ALIGNED(vma->node.start, vma->fence_size)); fence_size 144 drivers/gpu/drm/i915/i915_gem_fence_reg.c val |= I915_FENCE_SIZE_BITS(vma->fence_size); fence_size 170 drivers/gpu/drm/i915/i915_gem_fence_reg.c GEM_BUG_ON(!is_power_of_2(vma->fence_size)); fence_size 172 drivers/gpu/drm/i915/i915_gem_fence_reg.c GEM_BUG_ON(!IS_ALIGNED(vma->node.start, vma->fence_size)); fence_size 177 drivers/gpu/drm/i915/i915_gem_fence_reg.c val |= I830_FENCE_SIZE_BITS(vma->fence_size); fence_size 1889 drivers/gpu/drm/i915/i915_gem_gtt.c vma->fence_size = size; fence_size 160 drivers/gpu/drm/i915/i915_vma.c vma->fence_size = i915_gem_fence_size(vm->i915, vma->size, fence_size 163 drivers/gpu/drm/i915/i915_vma.c if (unlikely(vma->fence_size < vma->size || /* overflow */ fence_size 164 drivers/gpu/drm/i915/i915_vma.c vma->fence_size > vm->total)) fence_size 167 drivers/gpu/drm/i915/i915_vma.c GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT)); fence_size 467 drivers/gpu/drm/i915/i915_vma.c GEM_BUG_ON(!vma->fence_size); fence_size 469 drivers/gpu/drm/i915/i915_vma.c fenceable = (vma->node.size >= vma->fence_size && fence_size 472 drivers/gpu/drm/i915/i915_vma.c mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end; fence_size 556 drivers/gpu/drm/i915/i915_vma.c size = max_t(typeof(size), size, vma->fence_size); fence_size 66 drivers/gpu/drm/i915/i915_vma.h u32 fence_size; fence_size 41 drivers/gpu/drm/vmwgfx/vmwgfx_fence.c u32 fence_size; fence_size 315 drivers/gpu/drm/vmwgfx/vmwgfx_fence.c fman->fence_size = ttm_round_pot(sizeof(struct vmw_fence_obj)); fence_size 222 drivers/infiniband/hw/mlx4/qp.c s = (ctrl->qpn_vlan.fence_size & 0x3f) << 4; fence_size 2545 drivers/infiniband/hw/mlx4/qp.c ctrl->qpn_vlan.fence_size = fence_size 3797 drivers/infiniband/hw/mlx4/qp.c ctrl->qpn_vlan.fence_size = (wr->send_flags & IB_SEND_FENCE ? fence_size 1064 drivers/net/ethernet/mellanox/mlx4/en_tx.c qpn_vlan.fence_size = real_size; fence_size 1116 drivers/net/ethernet/mellanox/mlx4/en_tx.c tx_desc->ctrl.qpn_vlan.fence_size = MLX4_EN_XDP_TX_REAL_SZ; fence_size 300 include/linux/mlx4/qp.h u8 fence_size;