fence_reg_lo      133 drivers/gpu/drm/i915/gvt/aperture_gm.c 	i915_reg_t fence_reg_lo, fence_reg_hi;
fence_reg_lo      144 drivers/gpu/drm/i915/gvt/aperture_gm.c 	fence_reg_lo = FENCE_REG_GEN6_LO(reg->id);
fence_reg_lo      147 drivers/gpu/drm/i915/gvt/aperture_gm.c 	I915_WRITE(fence_reg_lo, 0);
fence_reg_lo      148 drivers/gpu/drm/i915/gvt/aperture_gm.c 	POSTING_READ(fence_reg_lo);
fence_reg_lo      151 drivers/gpu/drm/i915/gvt/aperture_gm.c 	I915_WRITE(fence_reg_lo, lower_32_bits(value));
fence_reg_lo      152 drivers/gpu/drm/i915/gvt/aperture_gm.c 	POSTING_READ(fence_reg_lo);
fence_reg_lo       65 drivers/gpu/drm/i915/i915_gem_fence_reg.c 	i915_reg_t fence_reg_lo, fence_reg_hi;
fence_reg_lo       70 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		fence_reg_lo = FENCE_REG_GEN6_LO(fence->id);
fence_reg_lo       75 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		fence_reg_lo = FENCE_REG_965_LO(fence->id);
fence_reg_lo      110 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		intel_uncore_write_fw(uncore, fence_reg_lo, 0);
fence_reg_lo      111 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		intel_uncore_posting_read_fw(uncore, fence_reg_lo);
fence_reg_lo      114 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		intel_uncore_write_fw(uncore, fence_reg_lo, lower_32_bits(val));
fence_reg_lo      115 drivers/gpu/drm/i915/i915_gem_fence_reg.c 		intel_uncore_posting_read_fw(uncore, fence_reg_lo);