fence_drv 935 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_fence_driver *drv = &ring->fence_drv; fence_drv 938 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c last_seq = atomic_read(&ring->fence_drv.last_seq); fence_drv 939 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c sync_seq = ring->fence_drv.sync_seq; fence_drv 996 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c struct amdgpu_fence_driver *drv = &ring->fence_drv; fence_drv 1039 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c length = ring->fence_drv.num_fences_mask + 1; fence_drv 1061 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c if (atomic_read(&ring->fence_drv.last_seq) != fence_drv 1062 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c ring->fence_drv.sync_seq) { fence_drv 100 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_fence_driver *drv = &ring->fence_drv; fence_drv 116 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_fence_driver *drv = &ring->fence_drv; fence_drv 149 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c seq = ++ring->fence_drv.sync_seq; fence_drv 152 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c &ring->fence_drv.lock, fence_drv 155 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, fence_drv 158 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; fence_drv 201 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c seq = ++ring->fence_drv.sync_seq; fence_drv 202 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, fence_drv 219 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c mod_timer(&ring->fence_drv.fallback_timer, fence_drv 236 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c struct amdgpu_fence_driver *drv = &ring->fence_drv; fence_drv 241 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c last_seq = atomic_read(&ring->fence_drv.last_seq); fence_drv 246 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (del_timer(&ring->fence_drv.fallback_timer) && fence_drv 247 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c seq != ring->fence_drv.sync_seq) fence_drv 292 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c fence_drv.fallback_timer); fence_drv 309 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c uint64_t seq = READ_ONCE(ring->fence_drv.sync_seq); fence_drv 316 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; fence_drv 372 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c emitted -= atomic_read(&ring->fence_drv.last_seq); fence_drv 373 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c emitted += READ_ONCE(ring->fence_drv.sync_seq); fence_drv 398 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.cpu_addr = &adev->wb.wb[ring->fence_offs]; fence_drv 399 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr = adev->wb.gpu_addr + (ring->fence_offs * 4); fence_drv 403 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.cpu_addr = adev->uvd.inst[ring->me].cpu_addr + index; fence_drv 404 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr = adev->uvd.inst[ring->me].gpu_addr + index; fence_drv 406 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_fence_write(ring, atomic_read(&ring->fence_drv.last_seq)); fence_drv 409 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.irq_src = irq_src; fence_drv 410 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.irq_type = irq_type; fence_drv 411 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.initialized = true; fence_drv 415 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr, ring->fence_drv.cpu_addr); fence_drv 443 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.cpu_addr = NULL; fence_drv 444 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.gpu_addr = 0; fence_drv 445 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.sync_seq = 0; fence_drv 446 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c atomic_set(&ring->fence_drv.last_seq, 0); fence_drv 447 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.initialized = false; fence_drv 449 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c timer_setup(&ring->fence_drv.fallback_timer, amdgpu_fence_fallback, 0); fence_drv 451 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.num_fences_mask = num_hw_submission * 2 - 1; fence_drv 452 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c spin_lock_init(&ring->fence_drv.lock); fence_drv 453 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.fences = kcalloc(num_hw_submission * 2, sizeof(void *), fence_drv 455 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!ring->fence_drv.fences) fence_drv 535 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!ring || !ring->fence_drv.initialized) fence_drv 542 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_put(adev, ring->fence_drv.irq_src, fence_drv 543 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.irq_type); fence_drv 545 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c del_timer_sync(&ring->fence_drv.fallback_timer); fence_drv 546 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c for (j = 0; j <= ring->fence_drv.num_fences_mask; ++j) fence_drv 547 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c dma_fence_put(ring->fence_drv.fences[j]); fence_drv 548 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c kfree(ring->fence_drv.fences); fence_drv 549 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.fences = NULL; fence_drv 550 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.initialized = false; fence_drv 568 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!ring || !ring->fence_drv.initialized) fence_drv 579 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_put(adev, ring->fence_drv.irq_src, fence_drv 580 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.irq_type); fence_drv 602 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!ring || !ring->fence_drv.initialized) fence_drv 606 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_irq_get(adev, ring->fence_drv.irq_src, fence_drv 607 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.irq_type); fence_drv 619 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c amdgpu_fence_write(ring, ring->fence_drv.sync_seq); fence_drv 651 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!timer_pending(&ring->fence_drv.fallback_timer)) fence_drv 706 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c if (!ring || !ring->fence_drv.initialized) fence_drv 713 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c atomic_read(&ring->fence_drv.last_seq)); fence_drv 715 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c ring->fence_drv.sync_seq); fence_drv 730 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c le32_to_cpu(*(ring->fence_drv.cpu_addr + 2))); fence_drv 733 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c le32_to_cpu(*(ring->fence_drv.cpu_addr + 4))); fence_drv 736 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c le32_to_cpu(*(ring->fence_drv.cpu_addr + 6))); fence_drv 47 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c job->base.sched->name, atomic_read(&ring->fence_drv.last_seq), fence_drv 48 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c ring->fence_drv.sync_seq); fence_drv 181 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h struct amdgpu_fence_driver fence_drv; fence_drv 834 drivers/gpu/drm/amd/amdgpu/cik_sdma.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 835 drivers/gpu/drm/amd/amdgpu/cik_sdma.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 4565 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 4566 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 2310 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 2311 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 3214 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 3215 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 6221 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 6222 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 5116 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 5117 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 773 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 774 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 1044 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 1045 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 1603 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 1604 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 1140 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 1141 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 422 drivers/gpu/drm/amd/amdgpu/si_dma.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 423 drivers/gpu/drm/amd/amdgpu/si_dma.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 1059 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 1060 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 1088 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 1089 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 862 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c uint32_t seq = ring->fence_drv.sync_seq; fence_drv 863 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c uint64_t addr = ring->fence_drv.gpu_addr; fence_drv 3558 drivers/gpu/drm/radeon/cik.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 3599 drivers/gpu/drm/radeon/cik.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 204 drivers/gpu/drm/radeon/cik_sdma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 45 drivers/gpu/drm/radeon/evergreen_dma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 1406 drivers/gpu/drm/radeon/ni.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 874 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0)); fence_drv 242 drivers/gpu/drm/radeon/r300.c radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0)); fence_drv 2877 drivers/gpu/drm/radeon/r600.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 2906 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, ((rdev->fence_drv[fence->ring].scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2)); fence_drv 291 drivers/gpu/drm/radeon/r600_dma.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 2372 drivers/gpu/drm/radeon/radeon.h struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS]; fence_drv 70 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; fence_drv 91 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; fence_drv 121 drivers/gpu/drm/radeon/radeon_fence.c &rdev->fence_drv[ring].lockup_work, fence_drv 147 drivers/gpu/drm/radeon/radeon_fence.c (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; fence_drv 178 drivers/gpu/drm/radeon/radeon_fence.c seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq); fence_drv 232 drivers/gpu/drm/radeon/radeon_fence.c last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); fence_drv 234 drivers/gpu/drm/radeon/radeon_fence.c last_emitted = rdev->fence_drv[ring].sync_seq[ring]; fence_drv 259 drivers/gpu/drm/radeon/radeon_fence.c } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); fence_drv 277 drivers/gpu/drm/radeon/radeon_fence.c struct radeon_fence_driver *fence_drv; fence_drv 281 drivers/gpu/drm/radeon/radeon_fence.c fence_drv = container_of(work, struct radeon_fence_driver, fence_drv 283 drivers/gpu/drm/radeon/radeon_fence.c rdev = fence_drv->rdev; fence_drv 284 drivers/gpu/drm/radeon/radeon_fence.c ring = fence_drv - &rdev->fence_drv[0]; fence_drv 292 drivers/gpu/drm/radeon/radeon_fence.c if (fence_drv->delayed_irq && rdev->ddev->irq_enabled) { fence_drv 295 drivers/gpu/drm/radeon/radeon_fence.c fence_drv->delayed_irq = false; fence_drv 309 drivers/gpu/drm/radeon/radeon_fence.c (uint64_t)atomic64_read(&fence_drv->last_seq), fence_drv 310 drivers/gpu/drm/radeon/radeon_fence.c fence_drv->sync_seq[ring], ring); fence_drv 351 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { fence_drv 356 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { fence_drv 369 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { fence_drv 377 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { fence_drv 397 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) fence_drv 407 drivers/gpu/drm/radeon/radeon_fence.c if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) { fence_drv 417 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[fence->ring].delayed_irq = true; fence_drv 656 drivers/gpu/drm/radeon/radeon_fence.c seq[ring] = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; fence_drv 657 drivers/gpu/drm/radeon/radeon_fence.c if (seq[ring] >= rdev->fence_drv[ring].sync_seq[ring]) { fence_drv 683 drivers/gpu/drm/radeon/radeon_fence.c seq[ring] = rdev->fence_drv[ring].sync_seq[ring]; fence_drv 747 drivers/gpu/drm/radeon/radeon_fence.c emitted = rdev->fence_drv[ring].sync_seq[ring] fence_drv 748 drivers/gpu/drm/radeon/radeon_fence.c - atomic64_read(&rdev->fence_drv[ring].last_seq); fence_drv 780 drivers/gpu/drm/radeon/radeon_fence.c fdrv = &fence->rdev->fence_drv[dst_ring]; fence_drv 811 drivers/gpu/drm/radeon/radeon_fence.c src = &fence->rdev->fence_drv[fence->ring]; fence_drv 812 drivers/gpu/drm/radeon/radeon_fence.c dst = &fence->rdev->fence_drv[dst_ring]; fence_drv 838 drivers/gpu/drm/radeon/radeon_fence.c radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); fence_drv 840 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg = 0; fence_drv 843 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; fence_drv 844 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + fence_drv 850 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index; fence_drv 851 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index; fence_drv 855 drivers/gpu/drm/radeon/radeon_fence.c r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg); fence_drv 861 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg - fence_drv 863 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4]; fence_drv 864 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index; fence_drv 866 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_write(rdev, atomic64_read(&rdev->fence_drv[ring].last_seq), ring); fence_drv 867 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = true; fence_drv 869 drivers/gpu/drm/radeon/radeon_fence.c ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr); fence_drv 887 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].scratch_reg = -1; fence_drv 888 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].cpu_addr = NULL; fence_drv 889 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].gpu_addr = 0; fence_drv 891 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].sync_seq[i] = 0; fence_drv 892 drivers/gpu/drm/radeon/radeon_fence.c atomic64_set(&rdev->fence_drv[ring].last_seq, 0); fence_drv 893 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = false; fence_drv 894 drivers/gpu/drm/radeon/radeon_fence.c INIT_DELAYED_WORK(&rdev->fence_drv[ring].lockup_work, fence_drv 896 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].rdev = rdev; fence_drv 939 drivers/gpu/drm/radeon/radeon_fence.c if (!rdev->fence_drv[ring].initialized) fence_drv 946 drivers/gpu/drm/radeon/radeon_fence.c cancel_delayed_work_sync(&rdev->fence_drv[ring].lockup_work); fence_drv 948 drivers/gpu/drm/radeon/radeon_fence.c radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg); fence_drv 949 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[ring].initialized = false; fence_drv 965 drivers/gpu/drm/radeon/radeon_fence.c if (rdev->fence_drv[ring].initialized) { fence_drv 966 drivers/gpu/drm/radeon/radeon_fence.c radeon_fence_write(rdev, rdev->fence_drv[ring].sync_seq[ring], ring); fence_drv 967 drivers/gpu/drm/radeon/radeon_fence.c cancel_delayed_work_sync(&rdev->fence_drv[ring].lockup_work); fence_drv 984 drivers/gpu/drm/radeon/radeon_fence.c if (!rdev->fence_drv[i].initialized) fence_drv 991 drivers/gpu/drm/radeon/radeon_fence.c (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq)); fence_drv 993 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_drv[i].sync_seq[i]); fence_drv 996 drivers/gpu/drm/radeon/radeon_fence.c if (i != j && rdev->fence_drv[j].initialized) fence_drv 998 drivers/gpu/drm/radeon/radeon_fence.c j, rdev->fence_drv[i].sync_seq[j]); fence_drv 739 drivers/gpu/drm/radeon/radeon_vce.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 3378 drivers/gpu/drm/radeon/si.c u64 addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 85 drivers/gpu/drm/radeon/uvd_v1_0.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 43 drivers/gpu/drm/radeon/uvd_v2_2.c uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; fence_drv 62 drivers/gpu/drm/virtio/virtgpu_debugfs.c (u64)atomic64_read(&vgdev->fence_drv.last_seq), fence_drv 63 drivers/gpu/drm/virtio/virtgpu_debugfs.c vgdev->fence_drv.sync_seq); fence_drv 199 drivers/gpu/drm/virtio/virtgpu_drv.h struct virtio_gpu_fence_driver fence_drv; fence_drv 71 drivers/gpu/drm/virtio/virtgpu_fence.c struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; fence_drv 92 drivers/gpu/drm/virtio/virtgpu_fence.c struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; fence_drv 110 drivers/gpu/drm/virtio/virtgpu_fence.c struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; fence_drv 115 drivers/gpu/drm/virtio/virtgpu_fence.c atomic64_set(&vgdev->fence_drv.last_seq, last_seq); fence_drv 146 drivers/gpu/drm/virtio/virtgpu_ioctl.c if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context)) fence_drv 143 drivers/gpu/drm/virtio/virtgpu_kms.c vgdev->fence_drv.context = dma_fence_context_alloc(1); fence_drv 144 drivers/gpu/drm/virtio/virtgpu_kms.c spin_lock_init(&vgdev->fence_drv.lock); fence_drv 145 drivers/gpu/drm/virtio/virtgpu_kms.c INIT_LIST_HEAD(&vgdev->fence_drv.fences); fence_drv 148 drivers/gpu/drm/virtio/virtgpu_object.c struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;