fence_context 904 drivers/gpu/drm/amd/amdgpu/amdgpu.h u64 fence_context; fence_context 2598 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); fence_context 153 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c adev->fence_context + ring->idx, fence_context 226 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c u64 fence_context = adev->vm_manager.fence_context + ring->idx; fence_context 235 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c array = dma_fence_array_create(i, fences, fence_context, fence_context 274 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c uint64_t fence_context = adev->fence_context + ring->idx; fence_context 285 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c if ((*id)->owner != vm->entity.fence_context || fence_context 288 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c ((*id)->last_flush->context != fence_context && fence_context 340 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c uint64_t fence_context = adev->fence_context + ring->idx; fence_context 352 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c if ((*id)->owner != vm->entity.fence_context) fence_context 359 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c ((*id)->last_flush->context != fence_context && fence_context 452 drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c id->owner = vm->entity.fence_context; fence_context 3009 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c adev->vm_manager.fence_context = fence_context 299 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h u64 fence_context; fence_context 202 drivers/gpu/drm/drm_crtc.c crtc->fence_context, ++crtc->fence_seqno); fence_context 272 drivers/gpu/drm/drm_crtc.c crtc->fence_context = dma_fence_context_alloc(1); fence_context 215 drivers/gpu/drm/drm_writeback.c wb_connector->fence_context = dma_fence_context_alloc(1); fence_context 414 drivers/gpu/drm/drm_writeback.c &wb_connector->fence_lock, wb_connector->fence_context, fence_context 1064 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu->fence_context, ++gpu->next_fence); fence_context 1640 drivers/gpu/drm/etnaviv/etnaviv_gpu.c gpu->fence_context = dma_fence_context_alloc(1); fence_context 123 drivers/gpu/drm/etnaviv/etnaviv_gpu.h u64 fence_context; fence_context 71 drivers/gpu/drm/i915/gt/intel_context.c ce->engine->name, ce->timeline->fence_context, fence_context 101 drivers/gpu/drm/i915/gt/intel_context.c ce->engine->name, ce->timeline->fence_context); fence_context 146 drivers/gpu/drm/i915/gt/intel_context.c ce->engine->name, ce->timeline->fence_context); fence_context 253 drivers/gpu/drm/i915/gt/intel_timeline.c timeline->fence_context = dma_fence_context_alloc(1); fence_context 23 drivers/gpu/drm/i915/gt/intel_timeline_types.h u64 fence_context; fence_context 14 drivers/gpu/drm/i915/gt/selftests/mock_timeline.c timeline->fence_context = context; fence_context 186 drivers/gpu/drm/i915/i915_active.c u64 idx = tl->fence_context; fence_context 267 drivers/gpu/drm/i915/i915_active.c GEM_BUG_ON(node->timeline != engine->kernel_context->timeline->fence_context); fence_context 602 drivers/gpu/drm/i915/i915_active.c u64 idx = engine->kernel_context->timeline->fence_context; fence_context 702 drivers/gpu/drm/i915/i915_request.c tl->fence_context, seqno); fence_context 93 drivers/gpu/drm/lima/lima_sched.c pipe->fence_context, ++pipe->fence_seqno); fence_context 335 drivers/gpu/drm/lima/lima_sched.c pipe->fence_context = dma_fence_context_alloc(1); fence_context 40 drivers/gpu/drm/lima/lima_sched.h u64 fence_context; fence_context 29 drivers/gpu/drm/panfrost/panfrost_job.c u64 fence_context; fence_context 97 drivers/gpu/drm/panfrost/panfrost_job.c js->queue[js_num].fence_context, fence->seqno); fence_context 525 drivers/gpu/drm/panfrost/panfrost_job.c js->queue[j].fence_context = dma_fence_context_alloc(1); fence_context 2374 drivers/gpu/drm/radeon/radeon.h u64 fence_context; fence_context 1310 drivers/gpu/drm/radeon/radeon_device.c rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); fence_context 152 drivers/gpu/drm/radeon/radeon_fence.c rdev->fence_context + ring, fence_context 83 drivers/gpu/drm/scheduler/sched_entity.c entity->fence_context = dma_fence_context_alloc(2); fence_context 403 drivers/gpu/drm/scheduler/sched_entity.c if (fence->context == entity->fence_context || fence_context 404 drivers/gpu/drm/scheduler/sched_entity.c fence->context == entity->fence_context + 1) { fence_context 171 drivers/gpu/drm/scheduler/sched_fence.c &fence->lock, entity->fence_context, seq); fence_context 173 drivers/gpu/drm/scheduler/sched_fence.c &fence->lock, entity->fence_context + 1, seq); fence_context 176 drivers/gpu/drm/scheduler/sched_main.c if (fence->context == entity->fence_context) fence_context 337 drivers/gpu/drm/scheduler/sched_main.c entity->fence_context) { fence_context 37 drivers/gpu/drm/v3d/v3d_drv.h u64 fence_context; fence_context 18 drivers/gpu/drm/v3d/v3d_fence.c v3d->queue[queue].fence_context, fence->seqno); fence_context 835 drivers/gpu/drm/v3d/v3d_gem.c v3d->queue[i].fence_context = dma_fence_context_alloc(1); fence_context 1085 include/drm/drm_crtc.h unsigned int fence_context; fence_context 59 include/drm/drm_writeback.h unsigned int fence_context; fence_context 89 include/drm/gpu_scheduler.h uint64_t fence_context;