fclk_ctrl_reg 103 drivers/clk/zynq/clkc.c const char *clk_name, void __iomem *fclk_ctrl_reg, fclk_ctrl_reg 113 drivers/clk/zynq/clkc.c void __iomem *fclk_gate_reg = fclk_ctrl_reg + 8; fclk_ctrl_reg 135 drivers/clk/zynq/clkc.c CLK_SET_RATE_NO_REPARENT, fclk_ctrl_reg, 4, 2, 0, fclk_ctrl_reg 139 drivers/clk/zynq/clkc.c 0, fclk_ctrl_reg, 8, 6, CLK_DIVIDER_ONE_BASED | fclk_ctrl_reg 143 drivers/clk/zynq/clkc.c CLK_SET_RATE_PARENT, fclk_ctrl_reg, 20, 6,