fb_divider        115 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	u32 val, temp, fb_divider;
fb_divider        121 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	fb_divider = (temp * VCO_PREF_DIV_RATIO) / val;
fb_divider        122 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	fb_divider = fb_divider / 2 - 1;
fb_divider        124 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 			fb_divider & 0xff);
fb_divider        128 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	val |= (fb_divider >> 8) & 0x07;
fb_divider        167 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 	u32 status, fb_divider, temp, ref_divider;
fb_divider        174 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		fb_divider = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_1);
fb_divider        175 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		fb_divider &= 0xff;
fb_divider        177 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		fb_divider = (temp << 8) | fb_divider;
fb_divider        178 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		fb_divider += 1;
fb_divider        185 drivers/gpu/drm/msm/dsi/pll/dsi_pll_28nm_8960.c 		vco_rate = (parent_rate / ref_divider) * fb_divider * 2;
fb_divider        164 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 fb_divider;
fb_divider        183 drivers/gpu/drm/radeon/rv6xx_dpm.c 	fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >>
fb_divider        188 drivers/gpu/drm/radeon/rv6xx_dpm.c 	r600_engine_clock_entry_set_feedback_divider(rdev, step_index, fb_divider);
fb_divider        537 drivers/gpu/drm/radeon/rv6xx_dpm.c 	u32 fb_divider = vco_freq / ref_freq;
fb_divider        539 drivers/gpu/drm/radeon/rv6xx_dpm.c 	return (ss_percent * ss_rate * 4 * (fb_divider * fb_divider) /