falcon_mask 467 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c unsigned long falcon_mask) falcon_mask 477 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c falcon_mask); falcon_mask 483 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue.c for_each_set_bit(falcon, &falcon_mask, NVKM_SECBOOT_FALCON_END) { falcon_mask 306 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c u32 falcon_mask; falcon_mask 309 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c unsigned long falcon_mask = msg->falcon_mask; falcon_mask 312 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c for_each_set_bit(falcon_id, &falcon_mask, NVKM_SECBOOT_FALCON_END) { falcon_mask 318 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c if (falcon_treated != msg->falcon_mask) { falcon_mask 321 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c msg->falcon_mask); falcon_mask 327 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c acr_boot_multiple_falcons(struct nvkm_msgqueue *priv, unsigned long falcon_mask) falcon_mask 338 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c u32 falcon_mask; falcon_mask 351 drivers/gpu/drm/nouveau/nvkm/falcon/msgqueue_0137c63d.c cmd.falcon_mask = falcon_mask; falcon_mask 960 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c unsigned long falcon_mask) falcon_mask 969 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c if (!(falcon_mask & BIT(NVKM_SECBOOT_FALCON_FECS))) falcon_mask 981 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c for_each_set_bit(falcon, &falcon_mask, NVKM_SECBOOT_FALCON_END) { falcon_mask 996 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c unsigned long falcon_mask) falcon_mask 1013 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c return acr_r352_reset_nopmu(acr, sb, falcon_mask); falcon_mask 1031 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c for_each_set_bit(falcon, &falcon_mask, NVKM_SECBOOT_FALCON_END) falcon_mask 1034 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c ret = nvkm_msgqueue_acr_boot_falcons(queue, falcon_mask); falcon_mask 105 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c nvkm_secboot_reset(struct nvkm_secboot *sb, unsigned long falcon_mask) falcon_mask 108 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c if ((falcon_mask | sb->acr->managed_falcons) != sb->acr->managed_falcons) { falcon_mask 113 drivers/gpu/drm/nouveau/nvkm/subdev/secboot/base.c return sb->acr->func->reset(sb->acr, sb, falcon_mask);