f_low             979 drivers/ata/pata_hpt37x.c 		unsigned int f_low, f_high;
f_low             985 drivers/ata/pata_hpt37x.c 		f_low = (MHz[clock_slot] * 48) / MHz[dpll];
f_low             986 drivers/ata/pata_hpt37x.c 		f_high = f_low + 2;
f_low             993 drivers/ata/pata_hpt37x.c 				       (f_high << 16) | f_low | 0x100);
f_low            1003 drivers/ata/pata_hpt37x.c 				f_low -= adjust >> 1;
f_low            1007 drivers/ata/pata_hpt37x.c 					       (f_high << 16) | f_low | 0x100);
f_low             497 drivers/ata/pata_hpt3x2n.c 	unsigned int f_low, f_high;
f_low             568 drivers/ata/pata_hpt3x2n.c 	f_low = (pci_mhz * 48) / 66;	/* PCI Mhz for 66Mhz DPLL */
f_low             569 drivers/ata/pata_hpt3x2n.c 	f_high = f_low + 2;		/* Tolerance */
f_low             571 drivers/ata/pata_hpt3x2n.c 	pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
f_low             579 drivers/ata/pata_hpt3x2n.c 		pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
f_low             848 drivers/ide/hpt366.c static int hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high)
f_low             850 drivers/ide/hpt366.c 	u32 dpll = (f_high << 16) | f_low | 0x100;
f_low            1060 drivers/ide/hpt366.c 		u16 f_low, delta = pci_clk < 50 ? 2 : 4;
f_low            1088 drivers/ide/hpt366.c 		f_low = (pci_clk * 48) / dpll_clk;
f_low            1091 drivers/ide/hpt366.c 			if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta))
f_low            1098 drivers/ide/hpt366.c 				f_low -= adjust >> 1;
f_low            1100 drivers/ide/hpt366.c 				f_low += adjust >> 1;