f20               174 arch/ia64/include/uapi/asm/ptrace.h 	struct ia64_fpreg f20;		/* preserved */
f20               142 arch/ia64/kernel/asm-offsets.c 	DEFINE(IA64_SWITCH_STACK_F20_OFFSET, offsetof (struct switch_stack, f20));
f20                49 arch/ia64/kernel/entry.h 	.spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off);		\
f20               239 arch/ia64/kernel/unaligned.c 	RSW(f20), RSW(f21), RSW(f22), RSW(f23), RSW(f24),
f20                30 arch/mips/include/asm/asmmacro-32.h 	s.d	$f20, THREAD_FPR20(\thread)
f20                54 arch/mips/include/asm/asmmacro-32.h 	l.d	$f20, THREAD_FPR20(\thread)
f20                98 arch/mips/include/asm/asmmacro.h 	sdc1	$f20, THREAD_FPR20(\thread)
f20               157 arch/mips/include/asm/asmmacro.h 	ldc1	$f20, THREAD_FPR20(\thread)
f20                57 arch/mips/include/asm/fpregdef.h #define fs0	$f20	 /* callee saved */
f20                94 arch/mips/include/asm/fpregdef.h #define ft8	$f20
f20               357 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 		v10, f11, v11, f12, v12, f13, v13, f14, v14, f15, v15, f16, v16, f17, v17, f18, v18, f19, v19, f20, v20)\
f20               378 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h 				FN(reg, f20), v20)
f20                22 tools/testing/selftests/powerpc/include/fpu_asm.h 	stfd	f20,(stack_size + STACK_FRAME_MIN_SIZE - 88)(%r1); \
f20                42 tools/testing/selftests/powerpc/include/fpu_asm.h 	lfd	f20,(stack_size + STACK_FRAME_MIN_SIZE - 88)(%r1); \
f20                61 tools/testing/selftests/powerpc/include/fpu_asm.h 	lfd	f20,48(r3)