Fpu_register       41 arch/parisc/math-emu/decode_exc.c #define Fpustatus_register Fpu_register[0]
Fpu_register       56 arch/parisc/math-emu/decode_exc.c #define Excp_type(index) Exceptiontype(Fpu_register[index])
Fpu_register       57 arch/parisc/math-emu/decode_exc.c #define Excp_instr(index) Instructionfield(Fpu_register[index])
Fpu_register       58 arch/parisc/math-emu/decode_exc.c #define Clear_excp_register(index) Allexception(Fpu_register[index]) = 0
Fpu_register       63 arch/parisc/math-emu/decode_exc.c #define Fpu_sgl(index) Fpu_register[index*2]
Fpu_register       65 arch/parisc/math-emu/decode_exc.c #define Fpu_dblp1(index) Fpu_register[index*2]
Fpu_register       66 arch/parisc/math-emu/decode_exc.c #define Fpu_dblp2(index) Fpu_register[(index*2)+1]
Fpu_register       68 arch/parisc/math-emu/decode_exc.c #define Fpu_quadp1(index) Fpu_register[index*2]
Fpu_register       69 arch/parisc/math-emu/decode_exc.c #define Fpu_quadp2(index) Fpu_register[(index*2)+1]
Fpu_register       70 arch/parisc/math-emu/decode_exc.c #define Fpu_quadp3(index) Fpu_register[(index*2)+2]
Fpu_register       71 arch/parisc/math-emu/decode_exc.c #define Fpu_quadp4(index) Fpu_register[(index*2)+3]
Fpu_register       85 arch/parisc/math-emu/decode_exc.c #define update_trap_counts(Fpu_register, aflags, bflags, trap_counts) {	\
Fpu_register       86 arch/parisc/math-emu/decode_exc.c 	aflags=(Fpu_register[0])>>27;	/* assumes zero fill. 32 bit */	\
Fpu_register       87 arch/parisc/math-emu/decode_exc.c 	Fpu_register[0] |= bflags;					\
Fpu_register       91 arch/parisc/math-emu/decode_exc.c decode_fpu(unsigned int Fpu_register[], unsigned int trap_counts[])
Fpu_register      107 arch/parisc/math-emu/decode_exc.c     bflags=(Fpu_register[0] & 0xf8000000);
Fpu_register      108 arch/parisc/math-emu/decode_exc.c     Fpu_register[0] &= 0x07ffffff;
Fpu_register      126 arch/parisc/math-emu/decode_exc.c 	update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register      155 arch/parisc/math-emu/decode_exc.c 		excp = fpudispatch(current_ir,excptype,0,Fpu_register);
Fpu_register      171 arch/parisc/math-emu/decode_exc.c 			 Fpu_register[exception_index]);
Fpu_register      178 arch/parisc/math-emu/decode_exc.c 				update_trap_counts(Fpu_register, aflags, bflags, 
Fpu_register      202 arch/parisc/math-emu/decode_exc.c 			update_trap_counts(Fpu_register, aflags, bflags, 
Fpu_register      212 arch/parisc/math-emu/decode_exc.c 		    if (Ibit(Fpu_register[exception_index])) inexact = TRUE;
Fpu_register      222 arch/parisc/math-emu/decode_exc.c 		        if (Rabit(Fpu_register[exception_index])) 
Fpu_register      234 arch/parisc/math-emu/decode_exc.c 		    	if (Rabit(Fpu_register[exception_index])) 
Fpu_register      255 arch/parisc/math-emu/decode_exc.c 		    	Set_exceptiontype(Fpu_register[exception_index],
Fpu_register      257 arch/parisc/math-emu/decode_exc.c 			Set_parmfield(Fpu_register[exception_index],0);
Fpu_register      258 arch/parisc/math-emu/decode_exc.c 			update_trap_counts(Fpu_register, aflags, bflags, 
Fpu_register      277 arch/parisc/math-emu/decode_exc.c 			update_trap_counts(Fpu_register, aflags, bflags, 
Fpu_register      280 arch/parisc/math-emu/decode_exc.c 			update_trap_counts(Fpu_register, aflags, bflags, 
Fpu_register      310 arch/parisc/math-emu/decode_exc.c 				Set_exceptiontype(Fpu_register[exception_index],
Fpu_register      312 arch/parisc/math-emu/decode_exc.c 				update_trap_counts(Fpu_register, aflags, bflags,
Fpu_register      328 arch/parisc/math-emu/decode_exc.c 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register      331 arch/parisc/math-emu/decode_exc.c 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register      335 arch/parisc/math-emu/decode_exc.c 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register      338 arch/parisc/math-emu/decode_exc.c 		update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register      355 arch/parisc/math-emu/decode_exc.c     update_trap_counts(Fpu_register, aflags, bflags, trap_counts);
Fpu_register       41 arch/parisc/math-emu/denormal.c #define Fpustatus_register Fpu_register[0]