exp_timing_cs0    100 drivers/mtd/maps/intel_vr_nor.c 	unsigned int exp_timing_cs0;
exp_timing_cs0    103 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
exp_timing_cs0    104 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 &= ~TIMING_WR_EN;
exp_timing_cs0    105 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
exp_timing_cs0    122 drivers/mtd/maps/intel_vr_nor.c 	unsigned int exp_timing_cs0;
exp_timing_cs0    140 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
exp_timing_cs0    141 drivers/mtd/maps/intel_vr_nor.c 	if (!(exp_timing_cs0 & TIMING_CS_EN)) {
exp_timing_cs0    147 drivers/mtd/maps/intel_vr_nor.c 	if ((exp_timing_cs0 & TIMING_MASK) == TIMING_MASK) {
exp_timing_cs0    152 drivers/mtd/maps/intel_vr_nor.c 	p->map.bankwidth = (exp_timing_cs0 & TIMING_BYTE_EN) ? 1 : 2;
exp_timing_cs0    163 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 |= TIMING_BOOT_ACCEL_DIS | TIMING_WR_EN;
exp_timing_cs0    164 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);
exp_timing_cs0    193 drivers/mtd/maps/intel_vr_nor.c 	unsigned int exp_timing_cs0;
exp_timing_cs0    232 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 = readl(p->csr_base + EXP_TIMING_CS0);
exp_timing_cs0    233 drivers/mtd/maps/intel_vr_nor.c 	exp_timing_cs0 &= ~TIMING_WR_EN;
exp_timing_cs0    234 drivers/mtd/maps/intel_vr_nor.c 	writel(exp_timing_cs0, p->csr_base + EXP_TIMING_CS0);