exp_region0_num_segments  117 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c 				exp_region0_num_segments, curve0->segments_num,
exp_region0_num_segments   31 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.h 	type exp_region0_num_segments; \
exp_region0_num_segments  282 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  283 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  309 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  310 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c 	reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_DGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  212 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  213 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c 	reg->masks.exp_region0_num_segments = dpp->tf_mask->CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  216 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	reg->shifts.exp_region0_num_segments = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;
exp_region0_num_segments  217 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c 	reg->masks.exp_region0_num_segments = mpc20->mpc_mask->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS;