evclk 561 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk); evclk 514 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = evclk 530 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].evclk = evclk 63 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 evclk; evclk 174 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 evclk; evclk 773 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c vce_clk_table.entries[i].eclk = vce_state->evclk; evclk 1347 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) evclk 990 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); evclk 994 drivers/gpu/drm/amd/amdgpu/kv_dpm.c (u8)kv_get_clk_bypass(adev, table->entries[i].evclk); evclk 997 drivers/gpu/drm/amd/amdgpu/kv_dpm.c table->entries[i].evclk, false, ÷rs); evclk 1529 drivers/gpu/drm/amd/amdgpu/kv_dpm.c static u8 kv_get_vce_boot_level(struct amdgpu_device *adev, u32 evclk) evclk 1536 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (table->entries[i].evclk >= evclk) evclk 1552 drivers/gpu/drm/amd/amdgpu/kv_dpm.c if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) { evclk 1556 drivers/gpu/drm/amd/amdgpu/kv_dpm.c pi->vce_boot_level = kv_get_vce_boot_level(adev, amdgpu_new_state->evclk); evclk 1572 drivers/gpu/drm/amd/amdgpu/kv_dpm.c } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) { evclk 2221 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; evclk 2224 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->evclk = 0; evclk 2289 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->evclk || new_rps->ecclk; evclk 3275 drivers/gpu/drm/amd/amdgpu/kv_dpm.c *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); evclk 338 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) evclk 3036 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 evclk, u32 ecclk, u16 *voltage) evclk 3043 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((evclk == 0) && (ecclk == 0)) || evclk 3050 drivers/gpu/drm/amd/amdgpu/si_dpm.c if ((evclk <= table->entries[i].evclk) && evclk 3467 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; evclk 3469 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, evclk 3472 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->evclk = 0; evclk 7978 drivers/gpu/drm/amd/amdgpu/si_dpm.c *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); evclk 618 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) evclk 796 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) evclk 31 drivers/gpu/drm/amd/include/kgd_pp_interface.h u32 evclk; evclk 1259 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c vce_state->evclk = le32_to_cpu(mm_dep_record->ulEClk); evclk 1161 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c vce_table->entries[i].evclk = ((unsigned long)entry->ucEVClkHigh << 16) evclk 1610 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c vce_state->evclk = ((uint32_t)vce_clock_info->ucEVClkHigh << 16) | le16_to_cpu(vce_clock_info->usEVClkLow); evclk 131 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h uint32_t evclk; evclk 4224 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); evclk 73 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t evclk; evclk 147 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h uint32_t evclk; evclk 4672 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); evclk 101 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h uint32_t evclk; evclk 118 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h uint32_t evclk; evclk 104 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t evclk; evclk 158 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t evclk; evclk 180 drivers/gpu/drm/amd/powerplay/inc/power_state.h unsigned long evclk; evclk 1570 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c table->VceLevel[count].Frequency = vce_table->entries[count].evclk; evclk 806 drivers/gpu/drm/radeon/ci_dpm.c rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; evclk 809 drivers/gpu/drm/radeon/ci_dpm.c rps->evclk = 0; evclk 2703 drivers/gpu/drm/radeon/ci_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk; evclk 4107 drivers/gpu/drm/radeon/ci_dpm.c if (table->entries[i].evclk >= min_evclk) evclk 4122 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_current_state->evclk != radeon_new_state->evclk) { evclk 4123 drivers/gpu/drm/radeon/ci_dpm.c if (radeon_new_state->evclk) { evclk 9468 drivers/gpu/drm/radeon/cik.c int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) evclk 908 drivers/gpu/drm/radeon/kv_dpm.c pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); evclk 912 drivers/gpu/drm/radeon/kv_dpm.c (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); evclk 915 drivers/gpu/drm/radeon/kv_dpm.c table->entries[i].evclk, false, ÷rs); evclk 1461 drivers/gpu/drm/radeon/kv_dpm.c static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) evclk 1468 drivers/gpu/drm/radeon/kv_dpm.c if (table->entries[i].evclk >= evclk) evclk 1484 drivers/gpu/drm/radeon/kv_dpm.c if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { evclk 1491 drivers/gpu/drm/radeon/kv_dpm.c pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); evclk 1508 drivers/gpu/drm/radeon/kv_dpm.c } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { evclk 2156 drivers/gpu/drm/radeon/kv_dpm.c new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; evclk 2159 drivers/gpu/drm/radeon/kv_dpm.c new_rps->evclk = 0; evclk 2224 drivers/gpu/drm/radeon/kv_dpm.c new_rps->evclk || new_rps->ecclk; evclk 2722 drivers/gpu/drm/radeon/ni.c int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) evclk 1107 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = evclk 1122 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].evclk = evclk 1341 drivers/gpu/drm/radeon/radeon.h u32 evclk; evclk 1436 drivers/gpu/drm/radeon/radeon.h u32 evclk; evclk 1525 drivers/gpu/drm/radeon/radeon.h u32 evclk; evclk 1961 drivers/gpu/drm/radeon/radeon.h int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk); evclk 698 drivers/gpu/drm/radeon/radeon_asic.h int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); evclk 750 drivers/gpu/drm/radeon/radeon_asic.h int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); evclk 788 drivers/gpu/drm/radeon/radeon_asic.h int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); evclk 7484 drivers/gpu/drm/radeon/si.c int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) evclk 7498 drivers/gpu/drm/radeon/si.c if (!evclk || !ecclk) { evclk 7505 drivers/gpu/drm/radeon/si.c r = radeon_uvd_calc_upll_dividers(rdev, evclk, ecclk, 125000, 250000, evclk 2937 drivers/gpu/drm/radeon/si_dpm.c u32 evclk, u32 ecclk, u16 *voltage) evclk 2944 drivers/gpu/drm/radeon/si_dpm.c if (((evclk == 0) && (ecclk == 0)) || evclk 2951 drivers/gpu/drm/radeon/si_dpm.c if ((evclk <= table->entries[i].evclk) && evclk 3008 drivers/gpu/drm/radeon/si_dpm.c rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; evclk 3010 drivers/gpu/drm/radeon/si_dpm.c si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, evclk 3013 drivers/gpu/drm/radeon/si_dpm.c rps->evclk = 0; evclk 5935 drivers/gpu/drm/radeon/si_dpm.c if ((old_rps->evclk != new_rps->evclk) || evclk 5938 drivers/gpu/drm/radeon/si_dpm.c if (new_rps->evclk || new_rps->ecclk) evclk 5942 drivers/gpu/drm/radeon/si_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); evclk 995 drivers/gpu/drm/radeon/trinity_dpm.c if ((old_rps->evclk != new_rps->evclk) || evclk 998 drivers/gpu/drm/radeon/trinity_dpm.c if (new_rps->evclk || new_rps->ecclk) evclk 1002 drivers/gpu/drm/radeon/trinity_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); evclk 1506 drivers/gpu/drm/radeon/trinity_dpm.c u32 evclk, u32 ecclk, u16 *voltage) evclk 1513 drivers/gpu/drm/radeon/trinity_dpm.c if (((evclk == 0) && (ecclk == 0)) || evclk 1520 drivers/gpu/drm/radeon/trinity_dpm.c if ((evclk <= table->entries[i].evclk) && evclk 1556 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; evclk 1559 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->evclk = 0; evclk 1577 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);