eu_disable        368 drivers/gpu/drm/i915/intel_device_info.c 	u32 fuse2, eu_disable, subslice_mask;
eu_disable        398 drivers/gpu/drm/i915/intel_device_info.c 		eu_disable = I915_READ(GEN9_EU_DISABLE(s));
eu_disable        407 drivers/gpu/drm/i915/intel_device_info.c 			eu_disabled_mask = (eu_disable >> (ss * 8)) & eu_mask;
eu_disable        472 drivers/gpu/drm/i915/intel_device_info.c 	u32 fuse2, subslice_mask, eu_disable[3]; /* s_max */
eu_disable        488 drivers/gpu/drm/i915/intel_device_info.c 	eu_disable[0] = I915_READ(GEN8_EU_DISABLE0) & GEN8_EU_DIS0_S0_MASK;
eu_disable        489 drivers/gpu/drm/i915/intel_device_info.c 	eu_disable[1] = (I915_READ(GEN8_EU_DISABLE0) >> GEN8_EU_DIS0_S1_SHIFT) |
eu_disable        492 drivers/gpu/drm/i915/intel_device_info.c 	eu_disable[2] = (I915_READ(GEN8_EU_DISABLE1) >> GEN8_EU_DIS1_S2_SHIFT) |
eu_disable        516 drivers/gpu/drm/i915/intel_device_info.c 				eu_disable[s] >> (ss * sseu->max_eus_per_subslice);