AcpLevel         1149 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 				   offsetof(SMU7_Fusion_DpmTable, AcpLevel),
AcpLevel          272 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	SMU72_Discrete_ExtClkLevel          AcpLevel[SMU72_MAX_LEVELS_ACP];
AcpLevel          256 drivers/gpu/drm/amd/powerplay/inc/smu73_discrete.h     SMU73_Discrete_ExtClkLevel          AcpLevel                [SMU73_MAX_LEVELS_ACP];
AcpLevel          288 drivers/gpu/drm/amd/powerplay/inc/smu74_discrete.h 	SMU74_Discrete_ExtClkLevel          AcpLevel[SMU74_MAX_LEVELS_ACP];
AcpLevel          294 drivers/gpu/drm/amd/powerplay/inc/smu75_discrete.h 	SMU75_Discrete_ExtClkLevel          AcpLevel                [SMU75_MAX_LEVELS_ACP];
AcpLevel          330 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     SMU7_Discrete_ExtClkLevel           AcpLevel                [SMU7_MAX_LEVELS_ACP];
AcpLevel          237 drivers/gpu/drm/amd/powerplay/inc/smu7_fusion.h     SMU7_Fusion_ExtClkLevel           AcpLevel                [SMU7_MAX_LEVELS_ACP];
AcpLevel         1602 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].Frequency = acp_table->entries[count].acpclk;
AcpLevel         1603 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].MinVoltage = acp_table->entries[count].v;
AcpLevel         1604 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].MinPhases = 1;
AcpLevel         1607 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 				table->AcpLevel[count].Frequency, &dividers);
AcpLevel         1611 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
AcpLevel         1613 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].Frequency);
AcpLevel         1614 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_US(table->AcpLevel[count].MinVoltage);
AcpLevel         1476 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].Frequency = mm_table->entries[count].aclk;
AcpLevel         1477 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].MinVoltage |= (mm_table->entries[count].vddc *
AcpLevel         1479 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].MinVoltage |= ((mm_table->entries[count].vddc -
AcpLevel         1481 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].MinVoltage |= 1 << PHASES_SHIFT;
AcpLevel         1485 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 				table->AcpLevel[count].Frequency, &dividers);
AcpLevel         1489 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
AcpLevel         1491 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].Frequency);
AcpLevel         1492 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].MinVoltage);
AcpLevel         1429 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].Frequency =
AcpLevel         1431 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].MinVoltage.Vddc =
AcpLevel         1434 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].MinVoltage.VddGfx =
AcpLevel         1438 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].MinVoltage.Vddci =
AcpLevel         1441 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].MinVoltage.Phases = 1;
AcpLevel         1445 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			table->AcpLevel[count].Frequency, &dividers);
AcpLevel         1449 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		table->AcpLevel[count].Divider = (uint8_t)dividers.pll_post_divider;
AcpLevel         1451 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 		CONVERT_FROM_HOST_TO_SMC_UL(table->AcpLevel[count].Frequency);
AcpLevel         2735 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].Frequency =
AcpLevel         2737 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].MinVoltage =
AcpLevel         2739 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].MinPhases = 1;
AcpLevel         2743 drivers/gpu/drm/radeon/ci_dpm.c 						     table->AcpLevel[count].Frequency, false, &dividers);
AcpLevel         2747 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].Divider = (u8)dividers.post_divider;
AcpLevel         2749 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].Frequency = cpu_to_be32(table->AcpLevel[count].Frequency);
AcpLevel         2750 drivers/gpu/drm/radeon/ci_dpm.c 		table->AcpLevel[count].MinVoltage = cpu_to_be16(table->AcpLevel[count].MinVoltage);
AcpLevel         1067 drivers/gpu/drm/radeon/kv_dpm.c 				   offsetof(SMU7_Fusion_DpmTable, AcpLevel),
AcpLevel          329 drivers/gpu/drm/radeon/smu7_discrete.h     SMU7_Discrete_ExtClkLevel           AcpLevel                [SMU7_MAX_LEVELS_ACP];
AcpLevel          237 drivers/gpu/drm/radeon/smu7_fusion.h     SMU7_Fusion_ExtClkLevel           AcpLevel                [SMU7_MAX_LEVELS_ACP];