FMT0_FMT_CONTROL 171 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_MAX, mask_sh),\ FMT0_FMT_CONTROL 172 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP, mask_sh),\ FMT0_FMT_CONTROL 173 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_STEREOSYNC_OVERRIDE, mask_sh),\ FMT0_FMT_CONTROL 179 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SRC_SELECT, mask_sh),\ FMT0_FMT_CONTROL 180 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED_CLEAR, mask_sh),\ FMT0_FMT_CONTROL 181 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_420_PIXEL_PHASE_LOCKED, mask_sh),\ FMT0_FMT_CONTROL 190 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_PIXEL_ENCODING, mask_sh),\ FMT0_FMT_CONTROL 191 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SUBSAMPLING_MODE, mask_sh),\ FMT0_FMT_CONTROL 192 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SUBSAMPLING_ORDER, mask_sh),\ FMT0_FMT_CONTROL 193 drivers/gpu/drm/amd/display/dc/dce/dce_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_CBCR_BIT_REDUCTION_BYPASS, mask_sh) FMT0_FMT_CONTROL 79 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_MAX, mask_sh), \ FMT0_FMT_CONTROL 80 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP, mask_sh), \ FMT0_FMT_CONTROL 81 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_PIXEL_ENCODING, mask_sh), \ FMT0_FMT_CONTROL 82 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h OPP_SF(FMT0_FMT_CONTROL, FMT_STEREOSYNC_OVERRIDE, mask_sh), \