eoim               61 arch/arm64/kvm/vgic-sys-reg-v3.c 		vmcr.eoim = (val & ICC_CTLR_EL1_EOImode_MASK) >> ICC_CTLR_EL1_EOImode_SHIFT;
eoim               79 arch/arm64/kvm/vgic-sys-reg-v3.c 		val |= (vmcr.eoim << ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK;
eoim              279 virt/kvm/arm/vgic/vgic-mmio-v2.c 		val |= vmcr.eoim << GIC_CPU_CTRL_EOImodeNS_SHIFT;
eoim              326 virt/kvm/arm/vgic/vgic-mmio-v2.c 		vmcr.eoim = !!(val & GIC_CPU_CTRL_EOImodeNS);
eoim              235 virt/kvm/arm/vgic/vgic-v2.c 	vmcr |= (vmcrp->eoim << GICH_VMCR_EOI_MODE_SHIFT) &
eoim              264 virt/kvm/arm/vgic/vgic-v2.c 	vmcrp->eoim = (vmcr & GICH_VMCR_EOI_MODE_MASK) >>
eoim              225 virt/kvm/arm/vgic/vgic-v3.c 	vmcr |= (vmcrp->eoim << ICH_VMCR_EOIM_SHIFT) & ICH_VMCR_EOIM_MASK;
eoim              258 virt/kvm/arm/vgic/vgic-v3.c 	vmcrp->eoim = (vmcr & ICH_VMCR_EOIM_MASK) >> ICH_VMCR_EOIM_SHIFT;
eoim              142 virt/kvm/arm/vgic/vgic.h 	u32	eoim;