engines 377 drivers/crypto/marvell/cesa.c struct mv_cesa_engine *engine = &cesa->engines[idx]; engines 422 drivers/crypto/marvell/cesa.c struct mv_cesa_engine *engine = &cesa->engines[idx]; engines 439 drivers/crypto/marvell/cesa.c struct mv_cesa_engine *engines; engines 471 drivers/crypto/marvell/cesa.c cesa->engines = devm_kcalloc(dev, caps->nengines, sizeof(*engines), engines 473 drivers/crypto/marvell/cesa.c if (!cesa->engines) engines 492 drivers/crypto/marvell/cesa.c struct mv_cesa_engine *engine = &cesa->engines[i]; engines 570 drivers/crypto/marvell/cesa.c clk_disable_unprepare(cesa->engines[i].zclk); engines 571 drivers/crypto/marvell/cesa.c clk_disable_unprepare(cesa->engines[i].clk); engines 586 drivers/crypto/marvell/cesa.c clk_disable_unprepare(cesa->engines[i].zclk); engines 587 drivers/crypto/marvell/cesa.c clk_disable_unprepare(cesa->engines[i].clk); engines 418 drivers/crypto/marvell/cesa.h struct mv_cesa_engine *engines; engines 735 drivers/crypto/marvell/cesa.h struct mv_cesa_engine *engine = cesa_dev->engines + i; engines 466 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; engines 708 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c if (pool->base.engines[i] != NULL) engines 709 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1046 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c pool->base.engines[i] = dce100_aux_engine_create(ctx, i); engines 1047 drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c if (pool->base.engines[i] == NULL) { engines 765 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (pool->base.engines[i] != NULL) engines 766 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1404 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c pool->base.engines[i] = dce110_aux_engine_create(ctx, i); engines 1405 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c if (pool->base.engines[i] == NULL) { engines 727 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (pool->base.engines[i] != NULL) engines 728 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1293 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c pool->base.engines[i] = dce112_aux_engine_create(ctx, i); engines 1294 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c if (pool->base.engines[i] == NULL) { engines 578 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c if (pool->base.engines[i] != NULL) engines 579 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1145 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c pool->base.engines[i] = dce120_aux_engine_create(ctx, i); engines 1146 drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c if (pool->base.engines[i] == NULL) { engines 756 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.engines[i] != NULL) engines 757 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1009 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.engines[i] = dce80_aux_engine_create(ctx, i); engines 1010 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.engines[i] == NULL) { engines 1206 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.engines[i] = dce80_aux_engine_create(ctx, i); engines 1207 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.engines[i] == NULL) { engines 1399 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c pool->base.engines[i] = dce80_aux_engine_create(ctx, i); engines 1400 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c if (pool->base.engines[i] == NULL) { engines 932 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (pool->base.engines[i] != NULL) engines 933 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1498 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c pool->base.engines[i] = dcn10_aux_engine_create(ctx, i); engines 1499 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (pool->base.engines[i] == NULL) { engines 1348 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pool->base.engines[i] != NULL) engines 1349 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 3644 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pool->base.engines[i] = dcn20_aux_engine_create(ctx, i); engines 3645 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (pool->base.engines[i] == NULL) { engines 876 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (pool->base.engines[i] != NULL) engines 877 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dce110_engine_destroy(&pool->base.engines[i]); engines 1574 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c pool->base.engines[i] = dcn21_aux_engine_create(ctx, i); engines 1575 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (pool->base.engines[i] == NULL) { engines 176 drivers/gpu/drm/amd/display/dc/inc/core_types.h struct dce_aux *engines[MAX_PIPES]; engines 264 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!e->engines[count]) engines 267 drivers/gpu/drm/i915/gem/i915_gem_context.c intel_context_put(e->engines[count]); engines 289 drivers/gpu/drm/i915/gem/i915_gem_context.c e = kzalloc(struct_size(e, engines, I915_NUM_ENGINES), GFP_KERNEL); engines 303 drivers/gpu/drm/i915/gem/i915_gem_context.c e->engines[id] = ce; engines 319 drivers/gpu/drm/i915/gem/i915_gem_context.c free_engines(rcu_access_pointer(ctx->engines)); engines 430 drivers/gpu/drm/i915/gem/i915_gem_context.c RCU_INIT_POINTER(ctx->engines, e); engines 867 drivers/gpu/drm/i915/gem/i915_gem_context.c intel_engine_mask_t engines, engines 902 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!(ce->engine->mask & engines)) engines 1359 drivers/gpu/drm/i915/gem/i915_gem_context.c struct i915_gem_engines *engines; engines 1384 drivers/gpu/drm/i915/gem/i915_gem_context.c if (idx >= set->engines->num_engines) { engines 1386 drivers/gpu/drm/i915/gem/i915_gem_context.c idx, set->engines->num_engines); engines 1390 drivers/gpu/drm/i915/gem/i915_gem_context.c idx = array_index_nospec(idx, set->engines->num_engines); engines 1391 drivers/gpu/drm/i915/gem/i915_gem_context.c if (set->engines->engines[idx]) { engines 1419 drivers/gpu/drm/i915/gem/i915_gem_context.c if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) { engines 1441 drivers/gpu/drm/i915/gem/i915_gem_context.c if (cmpxchg(&set->engines->engines[idx], NULL, ce)) { engines 1469 drivers/gpu/drm/i915/gem/i915_gem_context.c if (idx >= set->engines->num_engines) { engines 1471 drivers/gpu/drm/i915/gem/i915_gem_context.c idx, set->engines->num_engines); engines 1475 drivers/gpu/drm/i915/gem/i915_gem_context.c idx = array_index_nospec(idx, set->engines->num_engines); engines 1476 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!set->engines->engines[idx]) { engines 1480 drivers/gpu/drm/i915/gem/i915_gem_context.c virtual = set->engines->engines[idx]->engine; engines 1509 drivers/gpu/drm/i915/gem/i915_gem_context.c if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) engines 1557 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines = default_engines(ctx); engines 1558 drivers/gpu/drm/i915/gem/i915_gem_context.c if (IS_ERR(set.engines)) engines 1559 drivers/gpu/drm/i915/gem/i915_gem_context.c return PTR_ERR(set.engines); engines 1564 drivers/gpu/drm/i915/gem/i915_gem_context.c BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines))); engines 1566 drivers/gpu/drm/i915/gem/i915_gem_context.c !IS_ALIGNED(args->size, sizeof(*user->engines))) { engines 1576 drivers/gpu/drm/i915/gem/i915_gem_context.c num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines); engines 1578 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines = kmalloc(struct_size(set.engines, engines, num_engines), engines 1580 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!set.engines) engines 1583 drivers/gpu/drm/i915/gem/i915_gem_context.c init_rcu_head(&set.engines->rcu); engines 1589 drivers/gpu/drm/i915/gem/i915_gem_context.c if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) { engines 1590 drivers/gpu/drm/i915/gem/i915_gem_context.c __free_engines(set.engines, n); engines 1596 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines->engines[n] = NULL; engines 1606 drivers/gpu/drm/i915/gem/i915_gem_context.c __free_engines(set.engines, n); engines 1612 drivers/gpu/drm/i915/gem/i915_gem_context.c __free_engines(set.engines, n); engines 1616 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines->engines[n] = ce; engines 1618 drivers/gpu/drm/i915/gem/i915_gem_context.c set.engines->num_engines = num_engines; engines 1627 drivers/gpu/drm/i915/gem/i915_gem_context.c free_engines(set.engines); engines 1637 drivers/gpu/drm/i915/gem/i915_gem_context.c rcu_swap_protected(ctx->engines, set.engines, 1); engines 1640 drivers/gpu/drm/i915/gem/i915_gem_context.c call_rcu(&set.engines->rcu, free_engines_rcu); engines 1651 drivers/gpu/drm/i915/gem/i915_gem_context.c copy = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL); engines 1657 drivers/gpu/drm/i915/gem/i915_gem_context.c if (e->engines[n]) engines 1658 drivers/gpu/drm/i915/gem/i915_gem_context.c copy->engines[n] = intel_context_get(e->engines[n]); engines 1660 drivers/gpu/drm/i915/gem/i915_gem_context.c copy->engines[n] = NULL; engines 1692 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!check_struct_size(user, engines, count, &size)) { engines 1728 drivers/gpu/drm/i915/gem/i915_gem_context.c if (e->engines[n]) { engines 1729 drivers/gpu/drm/i915/gem/i915_gem_context.c ci.engine_class = e->engines[n]->engine->uabi_class; engines 1730 drivers/gpu/drm/i915/gem/i915_gem_context.c ci.engine_instance = e->engines[n]->engine->uabi_instance; engines 1733 drivers/gpu/drm/i915/gem/i915_gem_context.c if (copy_to_user(&user->engines[n], &ci, sizeof(ci))) { engines 1859 drivers/gpu/drm/i915/gem/i915_gem_context.c clone = kmalloc(struct_size(e, engines, e->num_engines), GFP_KERNEL); engines 1867 drivers/gpu/drm/i915/gem/i915_gem_context.c if (!e->engines[n]) { engines 1868 drivers/gpu/drm/i915/gem/i915_gem_context.c clone->engines[n] = NULL; engines 1871 drivers/gpu/drm/i915/gem/i915_gem_context.c engine = e->engines[n]->engine; engines 1883 drivers/gpu/drm/i915/gem/i915_gem_context.c clone->engines[n] = engines 1886 drivers/gpu/drm/i915/gem/i915_gem_context.c clone->engines[n] = intel_context_create(dst, engine); engines 1887 drivers/gpu/drm/i915/gem/i915_gem_context.c if (IS_ERR_OR_NULL(clone->engines[n])) { engines 1897 drivers/gpu/drm/i915/gem/i915_gem_context.c free_engines(dst->engines); engines 1898 drivers/gpu/drm/i915/gem/i915_gem_context.c RCU_INIT_POINTER(dst->engines, clone); engines 1932 drivers/gpu/drm/i915/gem/i915_gem_context.c clone = dst->engines; /* no locking required; sole access */ engines 1939 drivers/gpu/drm/i915/gem/i915_gem_context.c struct intel_context *ce = e->engines[n]; engines 1941 drivers/gpu/drm/i915/gem/i915_gem_context.c if (clone->engines[n]->engine->class != ce->engine->class) { engines 1952 drivers/gpu/drm/i915/gem/i915_gem_context.c clone->engines[n]->sseu = ce->sseu; engines 2370 drivers/gpu/drm/i915/gem/i915_gem_context.c const struct i915_gem_engines *e = it->engines; engines 2377 drivers/gpu/drm/i915/gem/i915_gem_context.c ctx = e->engines[it->idx++]; engines 179 drivers/gpu/drm/i915/gem/i915_gem_context.h return rcu_dereference_protected(ctx->engines, engines 204 drivers/gpu/drm/i915/gem/i915_gem_context.h struct i915_gem_engines *e = rcu_dereference(ctx->engines); engines 205 drivers/gpu/drm/i915/gem/i915_gem_context.h if (likely(idx < e->num_engines && e->engines[idx])) engines 206 drivers/gpu/drm/i915/gem/i915_gem_context.h ce = intel_context_get(e->engines[idx]); engines 214 drivers/gpu/drm/i915/gem/i915_gem_context.h struct i915_gem_engines *engines) engines 216 drivers/gpu/drm/i915/gem/i915_gem_context.h GEM_BUG_ON(!engines); engines 217 drivers/gpu/drm/i915/gem/i915_gem_context.h it->engines = engines; engines 224 drivers/gpu/drm/i915/gem/i915_gem_context.h #define for_each_gem_engine(ce, engines, it) \ engines 225 drivers/gpu/drm/i915/gem/i915_gem_context.h for (i915_gem_engines_iter_init(&(it), (engines)); \ engines 35 drivers/gpu/drm/i915/gem/i915_gem_context_types.h struct intel_context *engines[]; engines 40 drivers/gpu/drm/i915/gem/i915_gem_context_types.h const struct i915_gem_engines *engines; engines 77 drivers/gpu/drm/i915/gem/i915_gem_context_types.h struct i915_gem_engines __rcu *engines; engines 992 drivers/gpu/drm/i915/gem/selftests/huge_pages.c static struct intel_engine_cs *engines[I915_NUM_ENGINES]; engines 1021 drivers/gpu/drm/i915/gem/selftests/huge_pages.c engines[n++] = engine; engines 1047 drivers/gpu/drm/i915/gem/selftests/huge_pages.c engine = engines[order[i] % n]; engines 1468 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c __engine_name(struct drm_i915_private *i915, intel_engine_mask_t engines) engines 1473 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (engines == ALL_ENGINES) engines 1476 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c for_each_engine_masked(engine, i915, engines, tmp) engines 30 drivers/gpu/drm/i915/gem/selftests/mock_context.c RCU_INIT_POINTER(ctx->engines, e); engines 58 drivers/gpu/drm/i915/gem/selftests/mock_context.c free_engines(rcu_access_pointer(ctx->engines)); engines 77 drivers/gpu/drm/i915/gt/intel_engine_user.c struct list_head *engines) engines 85 drivers/gpu/drm/i915/gt/intel_engine_user.c list_add((struct list_head *)&engine->uabi_node, engines); engines 87 drivers/gpu/drm/i915/gt/intel_engine_user.c list_sort(NULL, engines, engine_cmp); engines 199 drivers/gpu/drm/i915/gt/intel_engine_user.c LIST_HEAD(engines); engines 201 drivers/gpu/drm/i915/gt/intel_engine_user.c sort_engines(i915, &engines); engines 205 drivers/gpu/drm/i915/gt/intel_engine_user.c list_for_each_safe(it, next, &engines) { engines 1597 drivers/gpu/drm/i915/i915_gpu_error.c intel_engine_mask_t engines, const char *msg) engines 1603 drivers/gpu/drm/i915/i915_gpu_error.c INTEL_GEN(error->i915), engines, engines 125 drivers/gpu/drm/i915/i915_query.c info_ptr = &query_ptr->engines[0]; engines 14 drivers/gpu/drm/nouveau/include/nvif/device.h u64 engines; engines 20 drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h u64 engines; engines 62 drivers/gpu/drm/nouveau/nvif/fifo.c device->runlist[i].engines = a->v.runlist[i].data; engines 93 drivers/gpu/drm/nouveau/nvif/fifo.c if (device->runlist[i].engines & a.v.engine.data) engines 208 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c u64 mask = chan->engines; engines 355 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c u64 hvmm, u64 push, u64 engines, int bar, u32 base, engines 368 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c chan->engines = engines; engines 25 drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.h u64 engines, int bar, u32 base, u32 user, engines 175 drivers/gpu/drm/omapdrm/omap_dmm_priv.h struct refill_engine *engines; engines 299 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (dmm->engines[i].async) engines 300 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c release_engine(&dmm->engines[i]); engines 302 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c complete(&dmm->engines[i].compl); engines 760 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c kfree(omap_dmm->engines); engines 898 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines = kcalloc(omap_dmm->num_engines, engines 899 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c sizeof(*omap_dmm->engines), GFP_KERNEL); engines 900 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c if (!omap_dmm->engines) { engines 906 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines[i].id = i; engines 907 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines[i].dmm = omap_dmm; engines 908 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines[i].refill_va = omap_dmm->refill_va + engines 910 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c omap_dmm->engines[i].refill_pa = omap_dmm->refill_pa + engines 912 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c init_completion(&omap_dmm->engines[i].compl); engines 914 drivers/gpu/drm/omapdrm/omap_dmm_tiler.c list_add(&omap_dmm->engines[i].idle_node, &omap_dmm->idle_head); engines 371 drivers/leds/leds-lp5521.c enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; engines 393 drivers/leds/leds-lp5521.c struct lp55xx_engine *engine = &chip->engines[nr - 1]; engines 394 drivers/leds/leds-lp5523.c enum lp55xx_engine_mode mode = chip->engines[nr - 1].mode; engines 416 drivers/leds/leds-lp5523.c struct lp55xx_engine *engine = &chip->engines[nr - 1]; engines 485 drivers/leds/leds-lp5523.c lp5523_mux_to_array(chip->engines[nr - 1].led_mux, mux); engines 495 drivers/leds/leds-lp5523.c struct lp55xx_engine *engine = &chip->engines[nr - 1]; engines 527 drivers/leds/leds-lp5523.c struct lp55xx_engine *engine = &chip->engines[nr - 1]; engines 207 drivers/leds/leds-lp55xx-common.c chip->engines[idx - 1].mode = LP55XX_ENGINE_LOAD; engines 154 drivers/leds/leds-lp55xx-common.h struct lp55xx_engine engines[LP55XX_ENGINE_MAX]; engines 1657 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1666 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 1695 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1705 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 1712 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1717 include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 2123 include/uapi/drm/i915_drm.h struct drm_i915_engine_info engines[]; engines 1657 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1666 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 1695 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1705 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 1712 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[0]; engines 1717 tools/include/uapi/drm/i915_drm.h struct i915_engine_class_instance engines[N__]; \ engines 2123 tools/include/uapi/drm/i915_drm.h struct drm_i915_engine_info engines[];