end_swp           147 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint32_t end_swp:2;
end_swp           151 arch/mips/include/asm/octeon/cvmx-npei-defs.h 		uint32_t end_swp:2;
end_swp           124 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t end_swp:2;
end_swp           128 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t end_swp:2;
end_swp            61 arch/mips/include/asm/octeon/cvmx-pemx-defs.h 		uint64_t end_swp:2;
end_swp            65 arch/mips/include/asm/octeon/cvmx-pemx-defs.h 		uint64_t end_swp:2;
end_swp           643 arch/mips/pci/pci-octeon.c 			bar1_index.s.end_swp = 1;
end_swp           679 arch/mips/pci/pci-octeon.c 			bar1_index.s.end_swp = 1;
end_swp           928 arch/mips/pci/pcie-octeon.c 	bar1_index.s.end_swp = 1;  /* Endian Swap mode */
end_swp          1411 arch/mips/pci/pcie-octeon.c 	bar1_index.s.end_swp = 1;  /* Endian Swap mode */