enc10 41 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.ctx enc10 43 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.ctx->logger enc10 46 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c (enc10->link_regs->reg) enc10 50 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->link_shift->field_name, enc10->link_mask->field_name enc10 97 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 101 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dc_bios *bp = enc10->base.ctx->dc_bios; enc10 109 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 120 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 134 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10) enc10 140 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 168 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10) enc10 171 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 178 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_symbols(enc10, true); enc10 181 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_mode(enc10); enc10 190 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c program_pattern_symbols(enc10, pattern_symbols); enc10 195 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, true); enc10 199 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 220 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_link_training_complete(enc10, false); enc10 224 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 227 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_mode(enc10); enc10 231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10) enc10 260 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c setup_panel_mode(enc10, DP_PANEL_MODE_DEFAULT); enc10 268 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_symbols(enc10, false); enc10 276 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, true); enc10 280 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10) enc10 283 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 288 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_symbols(enc10, false); enc10 296 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, true); enc10 300 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 304 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 308 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_symbols(enc10, true); enc10 313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, true); enc10 336 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c program_pattern_symbols(enc10, pattern_symbols); enc10 341 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, true); enc10 345 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 360 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 363 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.funcs->setup(&enc10->base, SIGNAL_TYPE_DISPLAY_PORT); enc10 366 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c setup_panel_mode(enc10, DP_PANEL_MODE_DEFAULT); enc10 389 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_link_training_complete(enc10, true); enc10 395 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 399 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 403 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c setup_panel_mode(enc10, panel_mode); enc10 416 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_link_training_complete(enc10, true); enc10 419 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enable_phy_bypass_mode(enc10, false); enc10 422 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c disable_prbs_mode(enc10); enc10 452 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 491 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 505 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 529 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 538 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 545 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c static void link_encoder_disable(struct dcn10_link_encoder *enc10) enc10 555 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c setup_panel_mode(enc10, DP_PANEL_MODE_DEFAULT); enc10 559 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10) enc10 562 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enum hpd_source_id hpd_source = enc10->base.hpd_source; enc10 568 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c const struct dcn10_link_encoder *enc10, enc10 583 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c max_pixel_clock = enc10->base.features.max_hdmi_pixel_clock; enc10 619 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c const struct dcn10_link_encoder *enc10, enc10 624 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.max_hdmi_deep_color; enc10 635 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c (adjusted_pix_clk_100hz > (enc10->base.features.max_hdmi_pixel_clock * 10))) enc10 639 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (!enc10->base.features.hdmi_ycbcr420_supported && enc10 643 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (!enc10->base.features.flags.bits.HDMI_6GB_EN && enc10 646 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (enc10->base.ctx->dc->debug.hdmi20_disable && enc10 653 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c const struct dcn10_link_encoder *enc10, enc10 657 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (!enc10->base.features.dp_ycbcr420_supported) enc10 665 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10, enc10 678 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.funcs = &dcn10_lnk_enc_funcs; enc10 679 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.ctx = init_data->ctx; enc10 680 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.id = init_data->encoder; enc10 682 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.hpd_source = init_data->hpd_source; enc10 683 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.connector = init_data->connector; enc10 685 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; enc10 687 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features = *enc_features; enc10 689 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.transmitter = init_data->transmitter; enc10 700 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.output_signals = enc10 720 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->link_regs = link_regs; enc10 721 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->aux_regs = aux_regs; enc10 722 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->hpd_regs = hpd_regs; enc10 723 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->link_shift = link_shift; enc10 724 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->link_mask = link_mask; enc10 726 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c switch (enc10->base.transmitter) { enc10 728 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGA; enc10 731 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGB; enc10 734 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGC; enc10 737 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGD; enc10 740 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGE; enc10 743 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGF; enc10 746 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGG; enc10 750 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; enc10 754 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = 1; enc10 756 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = bp_funcs->get_encoder_cap_info(enc10->base.ctx->dc_bios, enc10 757 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.id, &bp_cap_info); enc10 761 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.IS_HBR2_CAPABLE = enc10 763 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.IS_HBR3_CAPABLE = enc10 765 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN; enc10 766 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.DP_IS_USB_C = enc10 773 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (enc10->base.ctx->dc->debug.hdmi20_disable) { enc10 774 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = 0; enc10 782 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 789 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10, enc10 796 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10, enc10 803 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10, &stream->timing); enc10 822 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 828 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 829 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.connector_obj_id = enc10->base.connector; enc10 832 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 834 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (enc10->base.connector.id == CONNECTOR_ID_EDP) enc10 837 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 846 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c if (enc10->base.connector.id == CONNECTOR_ID_LVDS) { enc10 849 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 854 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c dcn10_aux_initialize(enc10); enc10 862 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c hpd_initialize(enc10); enc10 875 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 916 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 924 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 932 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 937 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 952 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 962 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc1_configure_encoder(enc10, link_settings); enc10 966 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 970 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 976 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 991 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1001 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc1_configure_encoder(enc10, link_settings); enc10 1005 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 1009 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 1015 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 1031 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1055 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 1056 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 1058 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.connector_obj_id = enc10->base.connector; enc10 1060 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c result = link_transmitter_control(enc10, &cntl); enc10 1071 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c link_encoder_disable(enc10); enc10 1078 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1089 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.transmitter = enc10->base.transmitter; enc10 1090 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.connector_obj_id = enc10->base.connector; enc10 1092 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c cntl.hpd_sel = enc10->base.hpd_source; enc10 1117 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c link_transmitter_control(enc10, &cntl); enc10 1126 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1142 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_d102(enc10); enc10 1145 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_symbol_error(enc10); enc10 1148 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_prbs7(enc10); enc10 1152 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10, param->custom_pattern); enc10 1155 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_hbr2_compliance_cp2520_2(enc10, 1); enc10 1158 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_hbr2_compliance_cp2520_2(enc10, 2); enc10 1161 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c set_dp_phy_pattern_hbr2_compliance_cp2520_2(enc10, 3); enc10 1165 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enc10, param->dp_panel_mode); enc10 1197 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1320 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1338 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c (enc10->hpd_regs->reg) enc10 1354 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1362 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 1370 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c (enc10->aux_regs->reg) enc10 1389 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c void dcn10_aux_initialize(struct dcn10_link_encoder *enc10) enc10 1391 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c enum hpd_source_id hpd_source = enc10->base.hpd_source; enc10 1405 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 405 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h struct dcn10_link_encoder *enc10, enc10 415 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h const struct dcn10_link_encoder *enc10, enc10 421 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h const struct dcn10_link_encoder *enc10, enc10 425 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h const struct dcn10_link_encoder *enc10, enc10 429 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h const struct dcn10_link_encoder *enc10, enc10 450 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h struct dcn10_link_encoder *enc10, enc10 516 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h void dcn10_aux_initialize(struct dcn10_link_encoder *enc10); enc10 752 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dcn10_link_encoder *enc10 = enc10 755 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (!enc10) enc10 758 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dcn10_link_encoder_construct(enc10, enc10 767 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c return &enc10->base; enc10 38 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.ctx enc10 40 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.ctx->logger enc10 43 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c (enc10->link_regs->reg) enc10 47 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->link_shift->field_name, enc10->link_mask->field_name enc10 50 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c (enc10->link_regs->index) enc10 170 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 180 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 188 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 201 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 210 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10, enc10 248 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 249 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn20_link_encoder *enc20 = (struct dcn20_link_encoder *) enc10; enc10 257 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c if (!update_cfg_data(enc10, link_settings, cfg)) enc10 260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc1_configure_encoder(enc10, link_settings); enc10 267 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c (enc10->aux_regs->reg) enc10 276 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = TO_DCN10_LINK_ENC(enc); enc10 314 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c dcn10_aux_initialize(enc10); enc10 361 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c struct dcn10_link_encoder *enc10 = &enc20->enc10; enc10 363 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.funcs = &dcn20_link_enc_funcs; enc10 364 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.ctx = init_data->ctx; enc10 365 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.id = init_data->encoder; enc10 367 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.hpd_source = init_data->hpd_source; enc10 368 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.connector = init_data->connector; enc10 370 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; enc10 372 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features = *enc_features; enc10 374 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.transmitter = init_data->transmitter; enc10 385 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.output_signals = enc10 405 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->link_regs = link_regs; enc10 406 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->aux_regs = aux_regs; enc10 407 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->hpd_regs = hpd_regs; enc10 408 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->link_shift = link_shift; enc10 409 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->link_mask = link_mask; enc10 411 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c switch (enc10->base.transmitter) { enc10 413 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGA; enc10 416 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGB; enc10 419 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGC; enc10 422 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGD; enc10 425 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGE; enc10 428 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGF; enc10 431 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_DIGG; enc10 435 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.preferred_engine = ENGINE_ID_UNKNOWN; enc10 439 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = 1; enc10 441 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c result = bp_funcs->get_encoder_cap_info(enc10->base.ctx->dc_bios, enc10 442 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.id, &bp_cap_info); enc10 446 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.IS_HBR2_CAPABLE = enc10 448 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.IS_HBR3_CAPABLE = enc10 450 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = bp_cap_info.HDMI_6GB_EN; enc10 451 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.DP_IS_USB_C = enc10 458 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c if (enc10->base.ctx->dc->debug.hdmi20_disable) { enc10 459 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c enc10->base.features.flags.bits.HDMI_6GB_EN = 0; enc10 145 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h struct dcn10_link_encoder enc10; enc10 1169 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c return &enc20->enc10.base;