enc1 813 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c struct dcn10_stream_encoder *enc1 = enc1 816 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c if (!enc1) enc1 819 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c dcn10_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, enc1 822 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c return &enc1->base; enc1 34 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.ctx->logger enc1 38 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c (enc1->regs->reg) enc1 42 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->se_shift->field_name, enc1->se_mask->field_name enc1 54 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.ctx enc1 57 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 160 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 168 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1, enc1 265 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 477 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 498 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 502 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c cntl.engine_id = enc1->base.id; enc1 508 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (enc1->base.bp->funcs->encoder_control( enc1 509 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.bp, &cntl) != BP_RESULT_OK) enc1 512 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_stream_encoder_set_stream_attribute_helper(enc1, crtc_timing); enc1 604 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 608 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c cntl.engine_id = enc1->base.id; enc1 615 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c if (enc1->base.bp->funcs->encoder_control( enc1 616 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.bp, &cntl) != BP_RESULT_OK) enc1 621 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_stream_encoder_set_stream_attribute_helper(enc1, crtc_timing); enc1 628 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 654 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 659 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_update_hdmi_info_packet(enc1, 0, &info_frame->avi); enc1 660 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_update_hdmi_info_packet(enc1, 1, &info_frame->vendor); enc1 661 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_update_hdmi_info_packet(enc1, 2, &info_frame->gamut); enc1 662 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_update_hdmi_info_packet(enc1, 3, &info_frame->spd); enc1 663 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1_update_hdmi_info_packet(enc1, 4, &info_frame->hdrsmd); enc1 669 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 711 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 716 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1, enc1 722 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1, enc1 728 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1, enc1 761 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 854 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 881 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 932 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1001 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1010 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1277 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1301 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1383 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1419 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1440 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1457 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1481 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1531 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1540 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1549 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 1595 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 1603 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.funcs = &dcn10_str_enc_funcs; enc1 1604 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.ctx = ctx; enc1 1605 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.id = eng_id; enc1 1606 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->base.bp = bp; enc1 1607 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->regs = regs; enc1 1608 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->se_shift = se_shift; enc1 1609 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c enc1->se_mask = se_mask; enc1 512 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h struct dcn10_stream_encoder *enc1, enc1 521 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h struct dcn10_stream_encoder *enc1, enc1 605 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h struct dcn10_stream_encoder *enc1, enc1 1215 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c struct dcn10_stream_encoder *enc1 = enc1 1218 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c if (!enc1) enc1 1226 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c dcn20_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, enc1 1230 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c return &enc1->base; enc1 34 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.ctx->logger enc1 38 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c (enc1->regs->reg) enc1 42 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->se_shift->field_name, enc1->se_mask->field_name enc1 46 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.ctx enc1 50 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 58 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1, enc1 148 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 154 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 0, &info_frame->avi); enc1 155 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 5, &info_frame->hfvsif); enc1 156 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 2, &info_frame->gamut); enc1 157 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 1, &info_frame->vendor); enc1 158 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 3, &info_frame->spd); enc1 159 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_hdmi_info_packet(enc1, 4, &info_frame->hdrsmd); enc1 165 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 212 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 281 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 296 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 310 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc2_update_gsp7_128_info_packet(enc1, &pps_sdp); enc1 348 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 378 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 426 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 454 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 535 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 546 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); enc1 599 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c struct dcn10_stream_encoder *enc1, enc1 607 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.funcs = &dcn20_str_enc_funcs; enc1 608 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.ctx = ctx; enc1 609 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.id = eng_id; enc1 610 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->base.bp = bp; enc1 611 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->regs = regs; enc1 612 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->se_shift = se_shift; enc1 613 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c enc1->se_mask = se_mask; enc1 89 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h struct dcn10_stream_encoder *enc1, enc1 1370 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c struct dcn10_stream_encoder *enc1 = enc1 1373 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c if (!enc1) enc1 1376 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c dcn20_stream_encoder_construct(enc1, ctx, ctx->dc_bios, eng_id, enc1 1380 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c return &enc1->base;