enabled_slices 12907 drivers/gpu/drm/i915/display/intel_display.c hw->ddb.enabled_slices != sw_ddb->enabled_slices) enabled_slices 12909 drivers/gpu/drm/i915/display/intel_display.c sw_ddb->enabled_slices, enabled_slices 12910 drivers/gpu/drm/i915/display/intel_display.c hw->ddb.enabled_slices); enabled_slices 13796 drivers/gpu/drm/i915/display/intel_display.c u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices; enabled_slices 13797 drivers/gpu/drm/i915/display/intel_display.c u8 required_slices = state->wm_results.ddb.enabled_slices; enabled_slices 4148 drivers/gpu/drm/i915/display/intel_display_power.c const u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices; enabled_slices 4165 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->wm.skl_hw.ddb.enabled_slices = req_slices; enabled_slices 4184 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->wm.skl_hw.ddb.enabled_slices = 1; enabled_slices 4203 drivers/gpu/drm/i915/display/intel_display_power.c dev_priv->wm.skl_hw.ddb.enabled_slices = 1; enabled_slices 896 drivers/gpu/drm/i915/i915_drv.h u8 enabled_slices; /* GEN11 has configurable 2 slices */ enabled_slices 3633 drivers/gpu/drm/i915/intel_pm.c u8 enabled_slices; enabled_slices 3636 drivers/gpu/drm/i915/intel_pm.c enabled_slices = 1; enabled_slices 3640 drivers/gpu/drm/i915/intel_pm.c return enabled_slices; enabled_slices 3648 drivers/gpu/drm/i915/intel_pm.c enabled_slices++; enabled_slices 3650 drivers/gpu/drm/i915/intel_pm.c return enabled_slices; enabled_slices 3849 drivers/gpu/drm/i915/intel_pm.c ddb->enabled_slices = 2; enabled_slices 3851 drivers/gpu/drm/i915/intel_pm.c ddb->enabled_slices = 1; enabled_slices 4051 drivers/gpu/drm/i915/intel_pm.c ddb->enabled_slices = intel_enabled_dbuf_slices_num(dev_priv);