enable_tdc_limit_feature  239 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h 	bool enable_tdc_limit_feature;
enable_tdc_limit_feature 1577 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	data->enable_tdc_limit_feature = true;
enable_tdc_limit_feature  278 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h 	bool                           enable_tdc_limit_feature;
enable_tdc_limit_feature 1125 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c 		if (data->enable_tdc_limit_feature) {
enable_tdc_limit_feature  255 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h 	bool enable_tdc_limit_feature;
enable_tdc_limit_feature  132 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 		data->registry_data.enable_tdc_limit_feature = 1;
enable_tdc_limit_feature  463 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 	if (data->registry_data.enable_tdc_limit_feature)
enable_tdc_limit_feature  235 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h 	uint8_t   enable_tdc_limit_feature;
enable_tdc_limit_feature  265 drivers/gpu/drm/radeon/ci_dpm.c 		pi->enable_tdc_limit_feature = true;
enable_tdc_limit_feature  658 drivers/gpu/drm/radeon/ci_dpm.c 			if (pi->enable_tdc_limit_feature) {
enable_tdc_limit_feature  283 drivers/gpu/drm/radeon/ci_dpm.h 	bool enable_tdc_limit_feature;