enable_shift       83 arch/arm/mach-omap2/display.c 	u32 enable_mask, enable_shift;
enable_shift       90 arch/arm/mach-omap2/display.c 		enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
enable_shift       95 arch/arm/mach-omap2/display.c 		enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
enable_shift      111 arch/arm/mach-omap2/display.c 	reg |= (lanes << enable_shift) & enable_mask;
enable_shift       46 drivers/clk/bcm/clk-cygnus.c #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \
enable_shift      594 drivers/clk/bcm/clk-iproc-pll.c 	val &= ~(1 << ctrl->enable.enable_shift);
enable_shift      616 drivers/clk/bcm/clk-iproc-pll.c 	val |= 1 << ctrl->enable.enable_shift;
enable_shift      185 drivers/clk/bcm/clk-iproc.h 	unsigned int enable_shift;
enable_shift       38 drivers/clk/bcm/clk-ns2.c #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \
enable_shift       36 drivers/clk/bcm/clk-nsp.c #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \
enable_shift       30 drivers/clk/bcm/clk-sr.c #define ENABLE_VAL(o, es, hs, bs) { .offset = o, .enable_shift = es, \
enable_shift      401 drivers/gpu/drm/amd/amdgpu/kv_dpm.c 			data |= ((1 << local_cac_reg->enable_shift) &
enable_shift       93 drivers/gpu/drm/amd/amdgpu/kv_dpm.h 	u32 enable_shift;
enable_shift     1945 drivers/gpu/drm/omapdrm/dss/dsi.c 	u32 enable_mask, enable_shift;
enable_shift     1950 drivers/gpu/drm/omapdrm/dss/dsi.c 		enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT;
enable_shift     1955 drivers/gpu/drm/omapdrm/dss/dsi.c 		enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT;
enable_shift     1964 drivers/gpu/drm/omapdrm/dss/dsi.c 		(lanes << enable_shift) | (lanes << pipd_shift));
enable_shift     1977 drivers/gpu/drm/omapdrm/dss/dsi.c 	u32 enable_shift;
enable_shift     1980 drivers/gpu/drm/omapdrm/dss/dsi.c 		enable_shift = OMAP5_DSI1_LANEENABLE_SHIFT;
enable_shift     1982 drivers/gpu/drm/omapdrm/dss/dsi.c 		enable_shift = OMAP5_DSI2_LANEENABLE_SHIFT;
enable_shift     1987 drivers/gpu/drm/omapdrm/dss/dsi.c 		OMAP5_DSI_LANEENABLE_MASK << enable_shift,
enable_shift     1988 drivers/gpu/drm/omapdrm/dss/dsi.c 		lanes << enable_shift);
enable_shift      275 drivers/gpu/drm/radeon/kv_dpm.c 			data |= ((1 << local_cac_reg->enable_shift) &
enable_shift       67 drivers/gpu/drm/radeon/kv_dpm.h 	u32 enable_shift;
enable_shift      222 drivers/mmc/host/dw_mmc-k3.c 	u32 enable_shift = 0;
enable_shift      245 drivers/mmc/host/dw_mmc-k3.c 			enable_shift = 1;
enable_shift      257 drivers/mmc/host/dw_mmc-k3.c 	mci_writel(host, ENABLE_SHIFT, enable_shift);
enable_shift       24 drivers/regulator/aat2870-regulator.c 	u8 enable_shift;
enable_shift      139 drivers/regulator/aat2870-regulator.c 	ri->enable_shift = id - AAT2870_ID_LDOA;
enable_shift      140 drivers/regulator/aat2870-regulator.c 	ri->enable_mask = 0x1 << ri->enable_shift;
enable_shift       94 drivers/regulator/s2mpa01.c 	unsigned int ramp_enable = 1, enable_shift = 0;
enable_shift       99 drivers/regulator/s2mpa01.c 		enable_shift = S2MPA01_BUCK1_RAMP_EN_SHIFT;
enable_shift      113 drivers/regulator/s2mpa01.c 		enable_shift = S2MPA01_BUCK2_RAMP_EN_SHIFT;
enable_shift      128 drivers/regulator/s2mpa01.c 		enable_shift = S2MPA01_BUCK3_RAMP_EN_SHIFT;
enable_shift      139 drivers/regulator/s2mpa01.c 		enable_shift = S2MPA01_BUCK4_RAMP_EN_SHIFT;
enable_shift      190 drivers/regulator/s2mpa01.c 					 1 << enable_shift, 1 << enable_shift);
enable_shift      204 drivers/regulator/s2mpa01.c 				  1 << enable_shift, 0);
enable_shift      114 drivers/regulator/s2mps11.c 	unsigned int ramp_enable = 1, enable_shift = 0;
enable_shift      128 drivers/regulator/s2mps11.c 		enable_shift = S2MPS11_BUCK2_RAMP_EN_SHIFT;
enable_shift      139 drivers/regulator/s2mps11.c 		enable_shift = S2MPS11_BUCK3_RAMP_EN_SHIFT;
enable_shift      154 drivers/regulator/s2mps11.c 		enable_shift = S2MPS11_BUCK4_RAMP_EN_SHIFT;
enable_shift      173 drivers/regulator/s2mps11.c 		enable_shift = S2MPS11_BUCK6_RAMP_EN_SHIFT;
enable_shift      211 drivers/regulator/s2mps11.c 					 1 << enable_shift, 1 << enable_shift);
enable_shift      225 drivers/regulator/s2mps11.c 				  1 << enable_shift, 0);
enable_shift      198 sound/soc/mediatek/common/mtk-afe-fe-dai.c 				       1, 1, memif->data->enable_shift);
enable_shift      223 sound/soc/mediatek/common/mtk-afe-fe-dai.c 				       1, 0, memif->data->enable_shift);
enable_shift       25 sound/soc/mediatek/common/mtk-base-afe.h 	int enable_shift;
enable_shift      478 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 				   1 << memif_tmp->data->enable_shift,
enable_shift      479 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 				   1 << memif_tmp->data->enable_shift);
enable_shift      486 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 				   1 << memif_tmp->data->enable_shift, 0);
enable_shift      999 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 1,
enable_shift     1017 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 2,
enable_shift     1035 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 3,
enable_shift     1053 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 4,
enable_shift     1071 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 5,
enable_shift     1089 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 7,
enable_shift     1107 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 10,
enable_shift     1125 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 11,
enable_shift     1143 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 12,
enable_shift     1161 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 13,
enable_shift     1179 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 14,
enable_shift     1197 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 8,
enable_shift     1215 sound/soc/mediatek/mt2701/mt2701-afe-pcm.c 		.enable_shift = 17,
enable_shift      400 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = DL1_ON_SFT,
enable_shift      417 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = DL2_ON_SFT,
enable_shift      434 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = DL3_ON_SFT,
enable_shift      451 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = VUL_ON_SFT,
enable_shift      468 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = AWB_ON_SFT,
enable_shift      485 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = VUL_DATA2_ON_SFT,
enable_shift      502 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = DAI_ON_SFT,
enable_shift      519 sound/soc/mediatek/mt6797/mt6797-afe-pcm.c 		.enable_shift = MOD_DAI_ON_SFT,
enable_shift      718 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 1,
enable_shift      734 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 2,
enable_shift      750 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 3,
enable_shift      766 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 4,
enable_shift      782 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 6,
enable_shift      798 sound/soc/mediatek/mt8173/mt8173-afe-pcm.c 		.enable_shift = 7,
enable_shift      438 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = DL1_ON_SFT,
enable_shift      459 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = DL2_ON_SFT,
enable_shift      480 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = DL3_ON_SFT,
enable_shift      501 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = VUL2_ON_SFT,
enable_shift      522 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = AWB_ON_SFT,
enable_shift      543 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = AWB2_ON_SFT,
enable_shift      564 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = VUL12_ON_SFT,
enable_shift      585 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = MOD_DAI_ON_SFT,
enable_shift      606 sound/soc/mediatek/mt8183/mt8183-afe-pcm.c 		.enable_shift = -1,