enable_counter_int  328 drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c 	.enable_counter_int	= hisi_ddrc_pmu_enable_counter_int,
enable_counter_int  339 drivers/perf/hisilicon/hisi_uncore_hha_pmu.c 	.enable_counter_int	= hisi_hha_pmu_enable_counter_int,
enable_counter_int  329 drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c 	.enable_counter_int	= hisi_l3c_pmu_enable_counter_int,
enable_counter_int  188 drivers/perf/hisilicon/hisi_uncore_pmu.c 	hisi_pmu->ops->enable_counter_int(hisi_pmu, hwc);
enable_counter_int   45 drivers/perf/hisilicon/hisi_uncore_pmu.h 	void (*enable_counter_int)(struct hisi_pmu *, struct hw_perf_event *);
enable_counter_int  113 drivers/perf/xgene_pmu.c 	void (*enable_counter_int)(struct xgene_pmu_dev *pmu_dev, int idx);
enable_counter_int  960 drivers/perf/xgene_pmu.c 	xgene_pmu->ops->enable_counter_int(pmu_dev, GET_CNTR(event));
enable_counter_int 1754 drivers/perf/xgene_pmu.c 	.enable_counter_int = xgene_pmu_enable_counter_int,
enable_counter_int 1771 drivers/perf/xgene_pmu.c 	.enable_counter_int = xgene_pmu_enable_counter_int,