enable_bit 44 arch/arm/mach-omap1/clock.c return val & clk->enable_bit ? 48000000 : 12000000; enable_bit 333 arch/arm/mach-omap1/clock.c val &= ~(1 << clk->enable_bit); enable_bit 335 arch/arm/mach-omap1/clock.c val |= (1 << clk->enable_bit); enable_bit 462 arch/arm/mach-omap1/clock.c regval32 |= (1 << clk->enable_bit); enable_bit 466 arch/arm/mach-omap1/clock.c regval16 |= (1 << clk->enable_bit); enable_bit 483 arch/arm/mach-omap1/clock.c regval32 &= ~(1 << clk->enable_bit); enable_bit 487 arch/arm/mach-omap1/clock.c regval16 &= ~(1 << clk->enable_bit); enable_bit 599 arch/arm/mach-omap1/clock.c if ((regval32 & (1 << clk->enable_bit)) == 0) enable_bit 151 arch/arm/mach-omap1/clock.h u8 enable_bit; enable_bit 99 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_CKOUT_ARM, enable_bit 111 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_SOSSI_CLK_EN_R, enable_bit 133 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_PERCK, enable_bit 152 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_GPIOCK, enable_bit 163 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_XORPCK, enable_bit 176 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_TIMCK, enable_bit 189 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_WDTCK, enable_bit 213 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_DSPCK, enable_bit 235 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_PERCK, enable_bit 247 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_XORPCK, enable_bit 256 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_DSPTIMCK, enable_bit 299 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_OCPI_CK, enable_bit 308 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_TC1_CK, enable_bit 322 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_TC2_CK, enable_bit 348 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_APICK, enable_bit 361 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_LBCK, enable_bit 386 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_LCDCK, enable_bit 400 arch/arm/mach-omap1/clock_data.c .enable_bit = EN_LCDCK, enable_bit 423 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_UART1_CLK_MODE_R, enable_bit 443 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_UART1_CLK_MODE_R, enable_bit 462 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_UART2_CLK_MODE_R, enable_bit 481 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_UART3_CLK_MODE_R, enable_bit 501 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_UART3_CLK_MODE_R, enable_bit 513 arch/arm/mach-omap1/clock_data.c .enable_bit = USB_MCLK_EN_BIT, enable_bit 523 arch/arm/mach-omap1/clock_data.c .enable_bit = USB_HOST_HHC_UHOST_EN, enable_bit 534 arch/arm/mach-omap1/clock_data.c .enable_bit = OTG_SYSCON_2_UHOST_EN_SHIFT enable_bit 543 arch/arm/mach-omap1/clock_data.c .enable_bit = SOFT_USB_OTG_DPLL_REQ_SHIFT, enable_bit 552 arch/arm/mach-omap1/clock_data.c .enable_bit = 9, enable_bit 561 arch/arm/mach-omap1/clock_data.c .enable_bit = 11, enable_bit 570 arch/arm/mach-omap1/clock_data.c .enable_bit = SOFT_COM_MCKO_REQ_SHIFT, enable_bit 578 arch/arm/mach-omap1/clock_data.c .enable_bit = COM_ULPD_PLL_CLK_REQ, enable_bit 596 arch/arm/mach-omap1/clock_data.c .enable_bit = SWD_ULPD_PLL_CLK_REQ, enable_bit 610 arch/arm/mach-omap1/clock_data.c .enable_bit = CONF_MOD_MMC_SD_CLK_REQ_R, enable_bit 625 arch/arm/mach-omap1/clock_data.c .enable_bit = 20, enable_bit 636 arch/arm/mach-omap1/clock_data.c .enable_bit = SOFT_MMC_DPLL_REQ_SHIFT, enable_bit 137 arch/arm/mach-omap2/cm2xxx.c static int _omap2xxx_apll_enable(u8 enable_bit, u8 status_bit) enable_bit 141 arch/arm/mach-omap2/cm2xxx.c m = EN_APLL_LOCKED << enable_bit; enable_bit 160 arch/arm/mach-omap2/cm2xxx.c static void _omap2xxx_apll_disable(u8 enable_bit) enable_bit 165 arch/arm/mach-omap2/cm2xxx.c v &= ~(EN_APLL_LOCKED << enable_bit); enable_bit 23 arch/mips/pci/pci-virtio-guest.c __BITFIELD_FIELD(unsigned enable_bit : 1, /* 31 */ enable_bit 51 arch/mips/pci/pci-virtio-guest.c pca.enable_bit = 1; enable_bit 239 arch/sh/drivers/pci/pcie-sh7786.c clk->enable_bit = BITS_CKE; enable_bit 272 drivers/clk/bcm/clk-kona.c u32 enable_bit; enable_bit 281 drivers/clk/bcm/clk-kona.c enable_bit = enable->bit; enable_bit 282 drivers/clk/bcm/clk-kona.c ret = __ccu_wait_bit(ccu, offset, enable_bit, false); enable_bit 290 drivers/clk/bcm/clk-kona.c __ccu_write(ccu, offset, (u32)1 << enable_bit); enable_bit 293 drivers/clk/bcm/clk-kona.c ret = __ccu_wait_bit(ccu, offset, enable_bit, false); enable_bit 73 drivers/clk/clk-max9485.c u8 enable_bit; enable_bit 115 drivers/clk/clk-max9485.c clk_hw->enable_bit, enable_bit 116 drivers/clk/clk-max9485.c clk_hw->enable_bit); enable_bit 123 drivers/clk/clk-max9485.c max9485_update_bits(clk_hw->drvdata, clk_hw->enable_bit, 0); enable_bit 206 drivers/clk/clk-max9485.c u8 enable_bit; enable_bit 213 drivers/clk/clk-max9485.c .enable_bit = MAX9485_MCLK_ENABLE, enable_bit 231 drivers/clk/clk-max9485.c .enable_bit = MAX9485_CLKOUT1_ENABLE, enable_bit 240 drivers/clk/clk-max9485.c .enable_bit = MAX9485_CLKOUT2_ENABLE, enable_bit 322 drivers/clk/clk-max9485.c drvdata->hw[i].enable_bit = max9485_clks[i].enable_bit; enable_bit 218 drivers/clk/ingenic/cgu.c ctl |= BIT(pll_info->enable_bit); enable_bit 250 drivers/clk/ingenic/cgu.c ctl &= ~BIT(pll_info->enable_bit); enable_bit 269 drivers/clk/ingenic/cgu.c return !!(ctl & BIT(pll_info->enable_bit)); enable_bit 52 drivers/clk/ingenic/cgu.h u8 enable_bit; enable_bit 69 drivers/clk/ingenic/jz4725b-cgu.c .enable_bit = 8, enable_bit 84 drivers/clk/ingenic/jz4740-cgu.c .enable_bit = 8, enable_bit 116 drivers/clk/ingenic/jz4770-cgu.c .enable_bit = 8, enable_bit 137 drivers/clk/ingenic/jz4770-cgu.c .enable_bit = 7, enable_bit 236 drivers/clk/ingenic/jz4780-cgu.c .enable_bit = 0, \ enable_bit 92 drivers/clk/renesas/clk-sh73a0.c u32 enable_bit = name[3] - '0'; enable_bit 95 drivers/clk/renesas/clk-sh73a0.c switch (enable_bit) { enable_bit 111 drivers/clk/renesas/clk-sh73a0.c if (readl(cpg->reg + CPG_PLLECR) & BIT(enable_bit)) { enable_bit 114 drivers/clk/renesas/clk-sh73a0.c if (enable_bit == 1 || enable_bit == 2) enable_bit 22 drivers/clk/sirf/clk-atlas6.c .enable_bit = 59, enable_bit 30 drivers/clk/sirf/clk-atlas6.c .enable_bit = 60, enable_bit 38 drivers/clk/sirf/clk-atlas6.c .enable_bit = 61, enable_bit 53 drivers/clk/sirf/clk-atlas6.c .enable_bit = 34, enable_bit 42 drivers/clk/sirf/clk-common.c signed char enable_bit; /* enable bit: 0 ~ 63 */ enable_bit 50 drivers/clk/sirf/clk-common.c signed char enable_bit; /* enable bit: 0 ~ 63 */ enable_bit 539 drivers/clk/sirf/clk-common.c .enable_bit = 0, enable_bit 554 drivers/clk/sirf/clk-common.c .enable_bit = 8, enable_bit 569 drivers/clk/sirf/clk-common.c .enable_bit = 9, enable_bit 589 drivers/clk/sirf/clk-common.c .enable_bit = 10, enable_bit 604 drivers/clk/sirf/clk-common.c .enable_bit = 11, enable_bit 641 drivers/clk/sirf/clk-common.c bit = clk->enable_bit % 32; enable_bit 642 drivers/clk/sirf/clk-common.c reg = clk->enable_bit / 32; enable_bit 654 drivers/clk/sirf/clk-common.c BUG_ON(clk->enable_bit < 0 || clk->enable_bit > 63); enable_bit 656 drivers/clk/sirf/clk-common.c bit = clk->enable_bit % 32; enable_bit 657 drivers/clk/sirf/clk-common.c reg = clk->enable_bit / 32; enable_bit 671 drivers/clk/sirf/clk-common.c BUG_ON(clk->enable_bit < 0 || clk->enable_bit > 63); enable_bit 673 drivers/clk/sirf/clk-common.c bit = clk->enable_bit % 32; enable_bit 674 drivers/clk/sirf/clk-common.c reg = clk->enable_bit / 32; enable_bit 699 drivers/clk/sirf/clk-common.c .enable_bit = 20, enable_bit 713 drivers/clk/sirf/clk-common.c .enable_bit = 32, enable_bit 727 drivers/clk/sirf/clk-common.c .enable_bit = 33, enable_bit 741 drivers/clk/sirf/clk-common.c .enable_bit = 35, enable_bit 755 drivers/clk/sirf/clk-common.c .enable_bit = 36, enable_bit 769 drivers/clk/sirf/clk-common.c .enable_bit = 37, enable_bit 783 drivers/clk/sirf/clk-common.c .enable_bit = 38, enable_bit 797 drivers/clk/sirf/clk-common.c .enable_bit = 39, enable_bit 811 drivers/clk/sirf/clk-common.c .enable_bit = 40, enable_bit 825 drivers/clk/sirf/clk-common.c .enable_bit = 41, enable_bit 839 drivers/clk/sirf/clk-common.c .enable_bit = 42, enable_bit 853 drivers/clk/sirf/clk-common.c .enable_bit = 43, enable_bit 867 drivers/clk/sirf/clk-common.c .enable_bit = 44, enable_bit 881 drivers/clk/sirf/clk-common.c .enable_bit = 45, enable_bit 895 drivers/clk/sirf/clk-common.c .enable_bit = 46, enable_bit 909 drivers/clk/sirf/clk-common.c .enable_bit = 47, enable_bit 923 drivers/clk/sirf/clk-common.c .enable_bit = 48, enable_bit 937 drivers/clk/sirf/clk-common.c .enable_bit = 49, enable_bit 951 drivers/clk/sirf/clk-common.c .enable_bit = 50, enable_bit 969 drivers/clk/sirf/clk-common.c .enable_bit = 1, enable_bit 983 drivers/clk/sirf/clk-common.c .enable_bit = 2, enable_bit 1001 drivers/clk/sirf/clk-common.c .enable_bit = 19, enable_bit 1019 drivers/clk/sirf/clk-common.c .enable_bit = 16, enable_bit 1033 drivers/clk/sirf/clk-common.c .enable_bit = 17, enable_bit 22 drivers/clk/sirf/clk-prima2.c .enable_bit = 59, enable_bit 30 drivers/clk/sirf/clk-prima2.c .enable_bit = 60, enable_bit 38 drivers/clk/sirf/clk-prima2.c .enable_bit = 61, enable_bit 52 drivers/clk/sirf/clk-prima2.c .enable_bit = 34, enable_bit 41 drivers/clk/spear/clk-aux-synth.c .enable_bit = AUX_SYNT_ENB, enable_bit 182 drivers/clk/spear/clk-aux-synth.c aux->masks->enable_bit, 0, lock); enable_bit 40 drivers/clk/spear/clk.h u32 enable_bit; enable_bit 308 drivers/clk/spear/spear1310_clock.c .enable_bit = SPEAR1310_I2S_SCLK_SYNTH_ENB, enable_bit 347 drivers/clk/spear/spear1340_clock.c .enable_bit = SPEAR1340_I2S_SCLK_SYNTH_ENB, enable_bit 388 drivers/clk/ti/apll.c clk_hw->enable_bit = val; enable_bit 161 drivers/clk/ti/clk-3xxx.c *idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET; enable_bit 184 drivers/clk/ti/clk-3xxx.c if (clk->enable_bit & AM35XX_IPSS_ICK_MASK) enable_bit 185 drivers/clk/ti/clk-3xxx.c *other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET; enable_bit 187 drivers/clk/ti/clk-3xxx.c *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; enable_bit 152 drivers/clk/ti/clkctrl.c if (!clk->enable_bit) enable_bit 158 drivers/clk/ti/clkctrl.c val |= clk->enable_bit; enable_bit 182 drivers/clk/ti/clkctrl.c if (!clk->enable_bit) enable_bit 215 drivers/clk/ti/clkctrl.c if (val & clk->enable_bit) enable_bit 317 drivers/clk/ti/clkctrl.c clk_hw->enable_bit = data->bit; enable_bit 596 drivers/clk/ti/clkctrl.c hw->enable_bit = MODULEMODE_SWCTRL; enable_bit 598 drivers/clk/ti/clkctrl.c hw->enable_bit = MODULEMODE_HWCTRL; enable_bit 154 drivers/clk/ti/clkt_dflt.c *other_bit = clk->enable_bit; enable_bit 180 drivers/clk/ti/clkt_dflt.c *idlest_bit = clk->enable_bit; enable_bit 230 drivers/clk/ti/clkt_dflt.c v &= ~(1 << clk->enable_bit); enable_bit 232 drivers/clk/ti/clkt_dflt.c v |= (1 << clk->enable_bit); enable_bit 260 drivers/clk/ti/clkt_dflt.c v |= (1 << clk->enable_bit); enable_bit 262 drivers/clk/ti/clkt_dflt.c v &= ~(1 << clk->enable_bit); enable_bit 287 drivers/clk/ti/clkt_dflt.c v ^= BIT(clk->enable_bit); enable_bit 289 drivers/clk/ti/clkt_dflt.c v &= BIT(clk->enable_bit); enable_bit 37 drivers/clk/ti/clkt_iclk.c v |= (1 << clk->enable_bit); enable_bit 52 drivers/clk/ti/clkt_iclk.c v &= ~(1 << clk->enable_bit); enable_bit 75 drivers/clk/ti/clkt_iclk.c *idlest_bit = clk->enable_bit; enable_bit 116 drivers/clk/ti/gate.c clk_hw->enable_bit = bit_idx; enable_bit 141 drivers/clk/ti/gate.c u8 enable_bit = 0; enable_bit 151 drivers/clk/ti/gate.c enable_bit = val; enable_bit 168 drivers/clk/ti/gate.c enable_bit, clk_gate_flags, ops, hw_ops); enable_bit 190 drivers/clk/ti/gate.c gate->enable_bit = val; enable_bit 51 drivers/clk/ti/interface.c clk_hw->enable_bit = bit_idx; enable_bit 74 drivers/clk/ti/interface.c u8 enable_bit = 0; enable_bit 81 drivers/clk/ti/interface.c enable_bit = val; enable_bit 90 drivers/clk/ti/interface.c enable_bit, ops); enable_bit 626 drivers/iio/imu/bmi160/bmi160_core.c unsigned int enable_bit = 0; enable_bit 629 drivers/iio/imu/bmi160/bmi160_core.c enable_bit = BMI160_DRDY_INT_EN; enable_bit 632 drivers/iio/imu/bmi160/bmi160_core.c BMI160_DRDY_INT_EN, enable_bit, enable_bit 8832 drivers/net/ethernet/broadcom/tg3.c static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit, bool silent) enable_bit 8855 drivers/net/ethernet/broadcom/tg3.c val &= ~enable_bit; enable_bit 8863 drivers/net/ethernet/broadcom/tg3.c ofs, enable_bit); enable_bit 8869 drivers/net/ethernet/broadcom/tg3.c if ((val & enable_bit) == 0) enable_bit 8876 drivers/net/ethernet/broadcom/tg3.c ofs, enable_bit); enable_bit 1484 drivers/perf/xgene_pmu.c int enable_bit; enable_bit 1510 drivers/perf/xgene_pmu.c enable_bit = 0; enable_bit 1512 drivers/perf/xgene_pmu.c enable_bit = (int) obj->integer.value; enable_bit 1514 drivers/perf/xgene_pmu.c ctx->name = xgene_pmu_dev_name(dev, type, enable_bit); enable_bit 1522 drivers/perf/xgene_pmu.c inf->enable_mask = 1 << enable_bit; enable_bit 1641 drivers/perf/xgene_pmu.c int enable_bit; enable_bit 1659 drivers/perf/xgene_pmu.c if (of_property_read_u32(np, "enable-bit-index", &enable_bit)) enable_bit 1660 drivers/perf/xgene_pmu.c enable_bit = 0; enable_bit 1662 drivers/perf/xgene_pmu.c ctx->name = xgene_pmu_dev_name(dev, type, enable_bit); enable_bit 1671 drivers/perf/xgene_pmu.c inf->enable_mask = 1 << enable_bit; enable_bit 345 drivers/phy/rockchip/phy-rockchip-typec.c u32 enable_bit; enable_bit 564 drivers/phy/rockchip/phy-rockchip-typec.c u32 val = en << reg->enable_bit; enable_bit 900 drivers/phy/rockchip/phy-rockchip-typec.c if (!(val & BIT(reg->enable_bit))) { enable_bit 290 drivers/regulator/anatop-regulator.c u32 enable_bit; enable_bit 295 drivers/regulator/anatop-regulator.c &enable_bit)) { enable_bit 301 drivers/regulator/anatop-regulator.c rdesc->enable_mask = BIT(enable_bit); enable_bit 82 drivers/regulator/da903x.c int enable_bit; enable_bit 141 drivers/regulator/da903x.c 1 << info->enable_bit); enable_bit 150 drivers/regulator/da903x.c 1 << info->enable_bit); enable_bit 164 drivers/regulator/da903x.c return !!(reg_val & (1 << info->enable_bit)); enable_bit 326 drivers/regulator/da903x.c .enable_bit = (ebit), \ enable_bit 348 drivers/regulator/da903x.c .enable_bit = (ebit), \ enable_bit 330 drivers/regulator/mc13783-regulator.c u32 en_val = mc13xxx_regulators[id].enable_bit; enable_bit 339 drivers/regulator/mc13783-regulator.c return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, enable_bit 355 drivers/regulator/mc13783-regulator.c dis_val = mc13xxx_regulators[id].enable_bit; enable_bit 357 drivers/regulator/mc13783-regulator.c return mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, enable_bit 380 drivers/regulator/mc13783-regulator.c return (val & mc13xxx_regulators[id].enable_bit) != 0; enable_bit 337 drivers/regulator/mc13892-regulator.c u32 en_val = mc13892_regulators[id].enable_bit; enable_bit 338 drivers/regulator/mc13892-regulator.c u32 mask = mc13892_regulators[id].enable_bit; enable_bit 362 drivers/regulator/mc13892-regulator.c dis_val = mc13892_regulators[id].enable_bit; enable_bit 364 drivers/regulator/mc13892-regulator.c return mc13892_powermisc_rmw(priv, mc13892_regulators[id].enable_bit, enable_bit 386 drivers/regulator/mc13892-regulator.c return (val & mc13892_regulators[id].enable_bit) != 0; enable_bit 36 drivers/regulator/mc13xxx-regulator-core.c mc13xxx_regulators[id].enable_bit, enable_bit 37 drivers/regulator/mc13xxx-regulator-core.c mc13xxx_regulators[id].enable_bit); enable_bit 49 drivers/regulator/mc13xxx-regulator-core.c mc13xxx_regulators[id].enable_bit, 0); enable_bit 63 drivers/regulator/mc13xxx-regulator-core.c return (val & mc13xxx_regulators[id].enable_bit) != 0; enable_bit 16 drivers/regulator/mc13xxx.h int enable_bit; enable_bit 67 drivers/regulator/mc13xxx.h .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ enable_bit 85 drivers/regulator/mc13xxx.h .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ enable_bit 100 drivers/regulator/mc13xxx.h .enable_bit = prefix ## _reg ## _ ## _name ## EN, \ enable_bit 59 drivers/regulator/tps6586x-regulator.c int enable_bit[2]; enable_bit 128 drivers/regulator/tps6586x-regulator.c .enable_bit[0] = (ebit0), \ enable_bit 130 drivers/regulator/tps6586x-regulator.c .enable_bit[1] = (ebit1), enable_bit 153 drivers/regulator/tps6586x-regulator.c .enable_bit[0] = (ebit0), \ enable_bit 155 drivers/regulator/tps6586x-regulator.c .enable_bit[1] = (ebit1), enable_bit 274 drivers/regulator/tps6586x-regulator.c ri->enable_bit[0] == ri->enable_bit[1]) enable_bit 285 drivers/regulator/tps6586x-regulator.c if (!(val2 & (1 << ri->enable_bit[1]))) enable_bit 292 drivers/regulator/tps6586x-regulator.c if (!(val1 & (1 << ri->enable_bit[0]))) { enable_bit 294 drivers/regulator/tps6586x-regulator.c 1 << ri->enable_bit[0]); enable_bit 300 drivers/regulator/tps6586x-regulator.c 1 << ri->enable_bit[1]); enable_bit 56 drivers/sh/clk/cpg.c sh_clk_write(sh_clk_read(clk) & ~(1 << clk->enable_bit), clk); enable_bit 71 drivers/sh/clk/cpg.c (read(mapped_status) & (1 << clk->enable_bit)) && i; enable_bit 76 drivers/sh/clk/cpg.c clk->enable_reg, clk->enable_bit); enable_bit 85 drivers/sh/clk/cpg.c sh_clk_write(sh_clk_read(clk) | (1 << clk->enable_bit), clk); enable_bit 138 drivers/sh/clk/cpg.c idx = (sh_clk_read(clk) >> clk->enable_bit) & clk->div_mask; enable_bit 154 drivers/sh/clk/cpg.c value &= ~(clk->div_mask << clk->enable_bit); enable_bit 155 drivers/sh/clk/cpg.c value |= (idx << clk->enable_bit); enable_bit 442 drivers/spi/spi-rspi.c u8 enable_bit) enable_bit 450 drivers/spi/spi-rspi.c rspi_enable_irq(rspi, enable_bit); enable_bit 421 drivers/staging/qlge/qlge_main.c u32 enable_bit = *((u32 *) &addr[0]); enable_bit 435 drivers/staging/qlge/qlge_main.c enable_bit); /* enable/disable */ enable_bit 2407 drivers/staging/qlge/qlge_main.c u32 enable_bit = MAC_ADDR_E; enable_bit 2410 drivers/staging/qlge/qlge_main.c err = ql_set_mac_addr_reg(qdev, (u8 *) &enable_bit, enable_bit 2438 drivers/staging/qlge/qlge_main.c u32 enable_bit = 0; enable_bit 2441 drivers/staging/qlge/qlge_main.c err = ql_set_mac_addr_reg(qdev, (u8 *) &enable_bit, enable_bit 169 drivers/tty/serial/msm_serial.c u32 enable_bit; enable_bit 264 drivers/tty/serial/msm_serial.c val &= ~dma->enable_bit; enable_bit 324 drivers/tty/serial/msm_serial.c dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE; enable_bit 326 drivers/tty/serial/msm_serial.c dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE; enable_bit 371 drivers/tty/serial/msm_serial.c dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE; enable_bit 373 drivers/tty/serial/msm_serial.c dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE; enable_bit 449 drivers/tty/serial/msm_serial.c val &= ~dma->enable_bit; enable_bit 519 drivers/tty/serial/msm_serial.c val |= dma->enable_bit; enable_bit 553 drivers/tty/serial/msm_serial.c val &= ~dma->enable_bit; enable_bit 651 drivers/tty/serial/msm_serial.c val |= dma->enable_bit; enable_bit 154 drivers/watchdog/iTCO_wdt.c u32 enable_bit; enable_bit 159 drivers/watchdog/iTCO_wdt.c enable_bit = 0x00000010; enable_bit 162 drivers/watchdog/iTCO_wdt.c enable_bit = 0x00000020; enable_bit 167 drivers/watchdog/iTCO_wdt.c enable_bit = 0x00000002; enable_bit 171 drivers/watchdog/iTCO_wdt.c return enable_bit; enable_bit 155 include/linux/clk/ti.h u8 enable_bit; enable_bit 57 include/linux/sh_clk.h unsigned int enable_bit; enable_bit 121 include/linux/sh_clk.h .enable_bit = _enable_bit, \ enable_bit 155 include/linux/sh_clk.h .enable_bit = _shift, \ enable_bit 179 include/linux/sh_clk.h .enable_bit = 0, /* unused */ \ enable_bit 192 include/linux/sh_clk.h .enable_bit = 0, /* unused */ \ enable_bit 574 sound/soc/ux500/ux500_msp_i2s.c u32 reg_val_GCR, enable_bit; enable_bit 587 sound/soc/ux500/ux500_msp_i2s.c enable_bit = TX_ENABLE; enable_bit 589 sound/soc/ux500/ux500_msp_i2s.c enable_bit = RX_ENABLE; enable_bit 591 sound/soc/ux500/ux500_msp_i2s.c writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR); enable_bit 98 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c unsigned int *enable_bit, enable_bit 103 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c *enable_bit = PCI_NON_PC0_ENABLE_BIT; enable_bit 107 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c *enable_bit = PCI_PC1_ENABLE_BIT; enable_bit 111 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c *enable_bit = PCI_PC6_ENABLE_BIT; enable_bit 115 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c *enable_bit = PCI_NBP1_ENTERED_BIT; enable_bit 126 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c int enable_bit, pci_offset, ret; enable_bit 129 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c ret = amd_fam14h_get_pci_info(state, &pci_offset, &enable_bit, cpu); enable_bit 136 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c val |= 1 << enable_bit; enable_bit 145 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c val |= 1 << enable_bit; enable_bit 149 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c state->name, PCI_MONITOR_ENABLE_REG, enable_bit, enable_bit 161 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c int enable_bit, pci_offset, ret; enable_bit 164 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c ret = amd_fam14h_get_pci_info(state, &pci_offset, &enable_bit, cpu); enable_bit 178 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c val, enable_bit, pci_offset); enable_bit 189 tools/power/cpupower/utils/idle_monitor/amd_fam14h_idle.c val &= ~(1 << enable_bit);