enable_base        68 drivers/irqchip/irq-sifive-plic.c 	void __iomem		*enable_base;
enable_base        75 drivers/irqchip/irq-sifive-plic.c 	u32 __iomem *reg = handler->enable_base + (hwirq / 32) * sizeof(u32);
enable_base       287 drivers/irqchip/irq-sifive-plic.c 		handler->enable_base =