emu_wd_int         41 drivers/crypto/cavium/nitrox/nitrox_hal.c 	union emu_wd_int_ena_w1s emu_wd_int;
emu_wd_int         53 drivers/crypto/cavium/nitrox/nitrox_hal.c 	emu_wd_int.value = 0;
emu_wd_int         54 drivers/crypto/cavium/nitrox/nitrox_hal.c 	emu_wd_int.s.se_wd = 1;
emu_wd_int         58 drivers/crypto/cavium/nitrox/nitrox_hal.c 		nitrox_write_csr(ndev, offset, emu_wd_int.value);