emc 262 arch/mips/include/asm/octeon/cvmx-pciercx-defs.h __BITFIELD_FIELD(uint32_t emc:1, emc 78 drivers/clk/tegra/clk-emc.c struct tegra_emc *emc; emc 176 drivers/clk/tegra/clk-emc.c if (tegra->emc) emc 177 drivers/clk/tegra/clk-emc.c return tegra->emc; emc 192 drivers/clk/tegra/clk-emc.c tegra->emc = platform_get_drvdata(pdev); emc 193 drivers/clk/tegra/clk-emc.c if (!tegra->emc) { emc 198 drivers/clk/tegra/clk-emc.c return tegra->emc; emc 208 drivers/clk/tegra/clk-emc.c struct tegra_emc *emc = emc_ensure_emc_driver(tegra); emc 210 drivers/clk/tegra/clk-emc.c if (!emc) emc 244 drivers/clk/tegra/clk-emc.c err = tegra_emc_prepare_timing_change(emc, timing->rate); emc 262 drivers/clk/tegra/clk-emc.c tegra_emc_complete_timing_change(emc, timing->rate); emc 480 drivers/memory/tegra/tegra124-emc.c static void emc_ccfifo_writel(struct tegra_emc *emc, u32 value, emc 483 drivers/memory/tegra/tegra124-emc.c writel(value, emc->regs + EMC_CCFIFO_DATA); emc 484 drivers/memory/tegra/tegra124-emc.c writel(offset, emc->regs + EMC_CCFIFO_ADDR); emc 487 drivers/memory/tegra/tegra124-emc.c static void emc_seq_update_timing(struct tegra_emc *emc) emc 492 drivers/memory/tegra/tegra124-emc.c writel(1, emc->regs + EMC_TIMING_CONTROL); emc 495 drivers/memory/tegra/tegra124-emc.c value = readl(emc->regs + EMC_STATUS); emc 501 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "timing update timed out\n"); emc 504 drivers/memory/tegra/tegra124-emc.c static void emc_seq_disable_auto_cal(struct tegra_emc *emc) emc 509 drivers/memory/tegra/tegra124-emc.c writel(0, emc->regs + EMC_AUTO_CAL_INTERVAL); emc 512 drivers/memory/tegra/tegra124-emc.c value = readl(emc->regs + EMC_AUTO_CAL_STATUS); emc 518 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "auto cal disable timed out\n"); emc 521 drivers/memory/tegra/tegra124-emc.c static void emc_seq_wait_clkchange(struct tegra_emc *emc) emc 527 drivers/memory/tegra/tegra124-emc.c value = readl(emc->regs + EMC_INTSTATUS); emc 533 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "clock change timed out\n"); emc 536 drivers/memory/tegra/tegra124-emc.c static struct emc_timing *tegra_emc_find_timing(struct tegra_emc *emc, emc 542 drivers/memory/tegra/tegra124-emc.c for (i = 0; i < emc->num_timings; i++) { emc 543 drivers/memory/tegra/tegra124-emc.c if (emc->timings[i].rate == rate) { emc 544 drivers/memory/tegra/tegra124-emc.c timing = &emc->timings[i]; emc 550 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "no timing for rate %lu\n", rate); emc 557 drivers/memory/tegra/tegra124-emc.c int tegra_emc_prepare_timing_change(struct tegra_emc *emc, emc 560 drivers/memory/tegra/tegra124-emc.c struct emc_timing *timing = tegra_emc_find_timing(emc, rate); emc 561 drivers/memory/tegra/tegra124-emc.c struct emc_timing *last = &emc->last_timing; emc 579 drivers/memory/tegra/tegra124-emc.c writel(EMC_INTSTATUS_CLKCHANGE_COMPLETE, emc->regs + EMC_INTSTATUS); emc 582 drivers/memory/tegra/tegra124-emc.c val = readl(emc->regs + EMC_CFG); emc 585 drivers/memory/tegra/tegra124-emc.c writel(val, emc->regs + EMC_CFG); emc 591 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3) emc 596 drivers/memory/tegra/tegra124-emc.c val = readl(emc->regs + EMC_SEL_DPD_CTRL); emc 599 drivers/memory/tegra/tegra124-emc.c writel(val, emc->regs + EMC_SEL_DPD_CTRL); emc 603 drivers/memory/tegra/tegra124-emc.c val = readl(emc->regs + EMC_BGBIAS_CTL0); emc 618 drivers/memory/tegra/tegra124-emc.c writel(val2, emc->regs + EMC_BGBIAS_CTL0); emc 624 drivers/memory/tegra/tegra124-emc.c val = readl(emc->regs + EMC_XM2DQSPADCTRL2); emc 638 drivers/memory/tegra/tegra124-emc.c writel(val, emc->regs + EMC_XM2DQSPADCTRL2); emc 645 drivers/memory/tegra/tegra124-emc.c emc_seq_update_timing(emc); emc 651 drivers/memory/tegra/tegra124-emc.c emc_seq_disable_auto_cal(emc); emc 653 drivers/memory/tegra/tegra124-emc.c emc->regs + EMC_CTT_TERM_CTRL); emc 654 drivers/memory/tegra/tegra124-emc.c emc_seq_update_timing(emc); emc 660 drivers/memory/tegra/tegra124-emc.c emc->regs + emc_burst_regs[i]); emc 662 drivers/memory/tegra/tegra124-emc.c writel(timing->emc_xm2dqspadctrl2, emc->regs + EMC_XM2DQSPADCTRL2); emc 663 drivers/memory/tegra/tegra124-emc.c writel(timing->emc_zcal_interval, emc->regs + EMC_ZCAL_INTERVAL); emc 665 drivers/memory/tegra/tegra124-emc.c tegra_mc_write_emem_configuration(emc->mc, timing->rate); emc 668 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, val, EMC_CFG); emc 672 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_auto_cal_config2, emc 676 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_auto_cal_config3, emc 682 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, val, EMC_AUTO_CAL_CONFIG); emc 686 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3 && emc 692 drivers/memory/tegra/tegra124-emc.c cnt -= emc->dram_num * 256; emc 705 drivers/memory/tegra/tegra124-emc.c writel(val, emc->regs + EMC_MRS_WAIT_CNT); emc 710 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, val, EMC_CFG_2); emc 713 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_OFF) emc 714 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_1, EMC_EMRS); emc 717 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_REFCTRL_DEV_SEL(emc->dram_num), emc 719 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3) emc 720 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_DRAM_DEV_SEL(emc->dram_num) | emc 725 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, 1, EMC_STALL_THEN_EXE_AFTER_CLKCHANGE); emc 728 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3) emc 729 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_DRAM_DEV_SEL(emc->dram_num), emc 731 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_REFCTRL_DEV_SEL(emc->dram_num) | emc 736 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3) { emc 738 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_1, EMC_EMRS); emc 740 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_2, EMC_EMRS2); emc 751 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, val, EMC_MRS); emc 755 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_2, EMC_MRW2); emc 757 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_1, EMC_MRW); emc 759 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_mode_4, EMC_MRW4); emc 764 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_ZQ_CAL_LONG_CMD_DEV0, EMC_ZQ_CAL); emc 765 drivers/memory/tegra/tegra124-emc.c if (emc->dram_num > 1) emc 766 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, EMC_ZQ_CAL_LONG_CMD_DEV1, emc 771 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, 0, EMC_CCFIFO_STATUS); emc 774 drivers/memory/tegra/tegra124-emc.c emc_ccfifo_writel(emc, timing->emc_cfg_2, EMC_CFG_2); emc 777 drivers/memory/tegra/tegra124-emc.c emc_seq_disable_auto_cal(emc); emc 780 drivers/memory/tegra/tegra124-emc.c readl(emc->regs + EMC_INTSTATUS); emc 785 drivers/memory/tegra/tegra124-emc.c void tegra_emc_complete_timing_change(struct tegra_emc *emc, emc 788 drivers/memory/tegra/tegra124-emc.c struct emc_timing *timing = tegra_emc_find_timing(emc, rate); emc 789 drivers/memory/tegra/tegra124-emc.c struct emc_timing *last = &emc->last_timing; emc 796 drivers/memory/tegra/tegra124-emc.c emc_seq_wait_clkchange(emc); emc 801 drivers/memory/tegra/tegra124-emc.c emc->regs + EMC_AUTO_CAL_INTERVAL); emc 805 drivers/memory/tegra/tegra124-emc.c writel(timing->emc_cfg, emc->regs + EMC_CFG); emc 808 drivers/memory/tegra/tegra124-emc.c writel(timing->emc_zcal_cnt_long, emc->regs + EMC_ZCAL_WAIT_CNT); emc 811 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_LPDDR3 && emc 817 drivers/memory/tegra/tegra124-emc.c writel(val, emc->regs + EMC_BGBIAS_CTL0); emc 819 drivers/memory/tegra/tegra124-emc.c if (emc->dram_type == DRAM_TYPE_DDR3 && emc 820 drivers/memory/tegra/tegra124-emc.c readl(emc->regs + EMC_BGBIAS_CTL0) != emc 823 drivers/memory/tegra/tegra124-emc.c emc->regs + EMC_BGBIAS_CTL0); emc 827 drivers/memory/tegra/tegra124-emc.c emc->regs + EMC_AUTO_CAL_INTERVAL); emc 834 drivers/memory/tegra/tegra124-emc.c writel(timing->emc_sel_dpd_ctrl, emc->regs + EMC_SEL_DPD_CTRL); emc 835 drivers/memory/tegra/tegra124-emc.c emc_seq_update_timing(emc); emc 837 drivers/memory/tegra/tegra124-emc.c emc->last_timing = *timing; emc 842 drivers/memory/tegra/tegra124-emc.c static void emc_read_current_timing(struct tegra_emc *emc, emc 849 drivers/memory/tegra/tegra124-emc.c readl(emc->regs + emc_burst_regs[i]); emc 851 drivers/memory/tegra/tegra124-emc.c timing->emc_cfg = readl(emc->regs + EMC_CFG); emc 861 drivers/memory/tegra/tegra124-emc.c static int emc_init(struct tegra_emc *emc) emc 863 drivers/memory/tegra/tegra124-emc.c emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); emc 864 drivers/memory/tegra/tegra124-emc.c emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK; emc 865 drivers/memory/tegra/tegra124-emc.c emc->dram_type >>= EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; emc 867 drivers/memory/tegra/tegra124-emc.c emc->dram_num = tegra_mc_get_emem_device_count(emc->mc); emc 869 drivers/memory/tegra/tegra124-emc.c emc_read_current_timing(emc, &emc->last_timing); emc 874 drivers/memory/tegra/tegra124-emc.c static int load_one_timing_from_dt(struct tegra_emc *emc, emc 883 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "timing %pOFn: failed to read rate: %d\n", emc 894 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, emc 903 drivers/memory/tegra/tegra124-emc.c dev_err(emc->dev, "timing %pOFn: failed to read " #prop ": %d\n", \ emc 945 drivers/memory/tegra/tegra124-emc.c static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc, emc 954 drivers/memory/tegra/tegra124-emc.c emc->timings = devm_kcalloc(emc->dev, child_count, sizeof(*timing), emc 956 drivers/memory/tegra/tegra124-emc.c if (!emc->timings) emc 959 drivers/memory/tegra/tegra124-emc.c emc->num_timings = child_count; emc 962 drivers/memory/tegra/tegra124-emc.c timing = &emc->timings[i++]; emc 964 drivers/memory/tegra/tegra124-emc.c err = load_one_timing_from_dt(emc, timing, child); emc 971 drivers/memory/tegra/tegra124-emc.c sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings, emc 1024 drivers/memory/tegra/tegra124-emc.c struct tegra_emc *emc = s->private; emc 1028 drivers/memory/tegra/tegra124-emc.c for (i = 0; i < emc->num_timings; i++) { emc 1029 drivers/memory/tegra/tegra124-emc.c struct emc_timing *timing = &emc->timings[i]; emc 1055 drivers/memory/tegra/tegra124-emc.c static void emc_debugfs_init(struct device *dev, struct tegra_emc *emc) emc 1077 drivers/memory/tegra/tegra124-emc.c file = debugfs_create_file("supported_rates", S_IRUGO, root, emc, emc 1087 drivers/memory/tegra/tegra124-emc.c struct tegra_emc *emc; emc 1092 drivers/memory/tegra/tegra124-emc.c emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL); emc 1093 drivers/memory/tegra/tegra124-emc.c if (!emc) emc 1096 drivers/memory/tegra/tegra124-emc.c emc->dev = &pdev->dev; emc 1099 drivers/memory/tegra/tegra124-emc.c emc->regs = devm_ioremap_resource(&pdev->dev, res); emc 1100 drivers/memory/tegra/tegra124-emc.c if (IS_ERR(emc->regs)) emc 1101 drivers/memory/tegra/tegra124-emc.c return PTR_ERR(emc->regs); emc 1114 drivers/memory/tegra/tegra124-emc.c emc->mc = platform_get_drvdata(mc); emc 1115 drivers/memory/tegra/tegra124-emc.c if (!emc->mc) emc 1128 drivers/memory/tegra/tegra124-emc.c err = tegra_emc_load_timings_from_dt(emc, np); emc 1133 drivers/memory/tegra/tegra124-emc.c if (emc->num_timings == 0) { emc 1140 drivers/memory/tegra/tegra124-emc.c err = emc_init(emc); emc 1146 drivers/memory/tegra/tegra124-emc.c platform_set_drvdata(pdev, emc); emc 1149 drivers/memory/tegra/tegra124-emc.c emc_debugfs_init(&pdev->dev, emc); emc 152 drivers/memory/tegra/tegra20-emc.c struct tegra_emc *emc = data; emc 156 drivers/memory/tegra/tegra20-emc.c status = readl_relaxed(emc->regs + EMC_INTSTATUS) & intmask; emc 162 drivers/memory/tegra/tegra20-emc.c complete(&emc->clk_handshake_complete); emc 166 drivers/memory/tegra/tegra20-emc.c dev_err_ratelimited(emc->dev, emc 170 drivers/memory/tegra/tegra20-emc.c writel_relaxed(status, emc->regs + EMC_INTSTATUS); emc 175 drivers/memory/tegra/tegra20-emc.c static struct emc_timing *tegra_emc_find_timing(struct tegra_emc *emc, emc 181 drivers/memory/tegra/tegra20-emc.c for (i = 0; i < emc->num_timings; i++) { emc 182 drivers/memory/tegra/tegra20-emc.c if (emc->timings[i].rate >= rate) { emc 183 drivers/memory/tegra/tegra20-emc.c timing = &emc->timings[i]; emc 189 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "no timing for rate %lu\n", rate); emc 196 drivers/memory/tegra/tegra20-emc.c static int emc_prepare_timing_change(struct tegra_emc *emc, unsigned long rate) emc 198 drivers/memory/tegra/tegra20-emc.c struct emc_timing *timing = tegra_emc_find_timing(emc, rate); emc 204 drivers/memory/tegra/tegra20-emc.c dev_dbg(emc->dev, "%s: using timing rate %lu for requested rate %lu\n", emc 210 drivers/memory/tegra/tegra20-emc.c emc->regs + emc_timing_registers[i]); emc 213 drivers/memory/tegra/tegra20-emc.c readl_relaxed(emc->regs + emc_timing_registers[i - 1]); emc 215 drivers/memory/tegra/tegra20-emc.c reinit_completion(&emc->clk_handshake_complete); emc 220 drivers/memory/tegra/tegra20-emc.c static int emc_complete_timing_change(struct tegra_emc *emc, bool flush) emc 224 drivers/memory/tegra/tegra20-emc.c dev_dbg(emc->dev, "%s: flush %d\n", __func__, flush); emc 229 drivers/memory/tegra/tegra20-emc.c emc->regs + EMC_TIMING_CONTROL); emc 233 drivers/memory/tegra/tegra20-emc.c timeout = wait_for_completion_timeout(&emc->clk_handshake_complete, emc 236 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "EMC-CAR handshake failed\n"); emc 239 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "failed to wait for EMC-CAR handshake: %ld\n", emc 250 drivers/memory/tegra/tegra20-emc.c struct tegra_emc *emc = container_of(nb, struct tegra_emc, clk_nb); emc 256 drivers/memory/tegra/tegra20-emc.c err = emc_prepare_timing_change(emc, cnd->new_rate); emc 260 drivers/memory/tegra/tegra20-emc.c err = emc_prepare_timing_change(emc, cnd->old_rate); emc 264 drivers/memory/tegra/tegra20-emc.c err = emc_complete_timing_change(emc, true); emc 268 drivers/memory/tegra/tegra20-emc.c err = emc_complete_timing_change(emc, false); emc 278 drivers/memory/tegra/tegra20-emc.c static int load_one_timing_from_dt(struct tegra_emc *emc, emc 286 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "incompatible DT node: %pOF\n", node); emc 292 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "timing %pOF: failed to read rate: %d\n", emc 301 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 313 drivers/memory/tegra/tegra20-emc.c dev_dbg(emc->dev, "%s: %pOF: EMC rate %lu\n", emc 333 drivers/memory/tegra/tegra20-emc.c static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc, emc 343 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, "no memory timings in DT node: %pOF\n", node); emc 347 drivers/memory/tegra/tegra20-emc.c emc->timings = devm_kcalloc(emc->dev, child_count, sizeof(*timing), emc 349 drivers/memory/tegra/tegra20-emc.c if (!emc->timings) emc 352 drivers/memory/tegra/tegra20-emc.c emc->num_timings = child_count; emc 353 drivers/memory/tegra/tegra20-emc.c timing = emc->timings; emc 356 drivers/memory/tegra/tegra20-emc.c err = load_one_timing_from_dt(emc, timing++, child); emc 363 drivers/memory/tegra/tegra20-emc.c sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings, emc 398 drivers/memory/tegra/tegra20-emc.c static int emc_setup_hw(struct tegra_emc *emc) emc 403 drivers/memory/tegra/tegra20-emc.c emc_cfg = readl_relaxed(emc->regs + EMC_CFG_2); emc 411 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 418 drivers/memory/tegra/tegra20-emc.c writel_relaxed(emc_cfg, emc->regs + EMC_CFG_2); emc 421 drivers/memory/tegra/tegra20-emc.c writel_relaxed(intmask, emc->regs + EMC_INTMASK); emc 422 drivers/memory/tegra/tegra20-emc.c writel_relaxed(intmask, emc->regs + EMC_INTSTATUS); emc 427 drivers/memory/tegra/tegra20-emc.c static int emc_init(struct tegra_emc *emc, unsigned long rate) emc 431 drivers/memory/tegra/tegra20-emc.c err = clk_set_parent(emc->emc_mux, emc->backup_clk); emc 433 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 438 drivers/memory/tegra/tegra20-emc.c err = clk_set_rate(emc->pll_m, rate); emc 440 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 445 drivers/memory/tegra/tegra20-emc.c err = clk_set_parent(emc->emc_mux, emc->pll_m); emc 447 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 452 drivers/memory/tegra/tegra20-emc.c err = clk_set_rate(emc->clk, rate); emc 454 drivers/memory/tegra/tegra20-emc.c dev_err(emc->dev, emc 465 drivers/memory/tegra/tegra20-emc.c struct tegra_emc *emc; emc 487 drivers/memory/tegra/tegra20-emc.c emc = devm_kzalloc(&pdev->dev, sizeof(*emc), GFP_KERNEL); emc 488 drivers/memory/tegra/tegra20-emc.c if (!emc) { emc 493 drivers/memory/tegra/tegra20-emc.c init_completion(&emc->clk_handshake_complete); emc 494 drivers/memory/tegra/tegra20-emc.c emc->clk_nb.notifier_call = tegra_emc_clk_change_notify; emc 495 drivers/memory/tegra/tegra20-emc.c emc->dev = &pdev->dev; emc 497 drivers/memory/tegra/tegra20-emc.c err = tegra_emc_load_timings_from_dt(emc, np); emc 503 drivers/memory/tegra/tegra20-emc.c emc->regs = devm_ioremap_resource(&pdev->dev, res); emc 504 drivers/memory/tegra/tegra20-emc.c if (IS_ERR(emc->regs)) emc 505 drivers/memory/tegra/tegra20-emc.c return PTR_ERR(emc->regs); emc 507 drivers/memory/tegra/tegra20-emc.c err = emc_setup_hw(emc); emc 512 drivers/memory/tegra/tegra20-emc.c dev_name(&pdev->dev), emc); emc 518 drivers/memory/tegra/tegra20-emc.c emc->clk = devm_clk_get(&pdev->dev, "emc"); emc 519 drivers/memory/tegra/tegra20-emc.c if (IS_ERR(emc->clk)) { emc 520 drivers/memory/tegra/tegra20-emc.c err = PTR_ERR(emc->clk); emc 525 drivers/memory/tegra/tegra20-emc.c emc->pll_m = clk_get_sys(NULL, "pll_m"); emc 526 drivers/memory/tegra/tegra20-emc.c if (IS_ERR(emc->pll_m)) { emc 527 drivers/memory/tegra/tegra20-emc.c err = PTR_ERR(emc->pll_m); emc 532 drivers/memory/tegra/tegra20-emc.c emc->backup_clk = clk_get_sys(NULL, "pll_p"); emc 533 drivers/memory/tegra/tegra20-emc.c if (IS_ERR(emc->backup_clk)) { emc 534 drivers/memory/tegra/tegra20-emc.c err = PTR_ERR(emc->backup_clk); emc 539 drivers/memory/tegra/tegra20-emc.c emc->emc_mux = clk_get_parent(emc->clk); emc 540 drivers/memory/tegra/tegra20-emc.c if (IS_ERR(emc->emc_mux)) { emc 541 drivers/memory/tegra/tegra20-emc.c err = PTR_ERR(emc->emc_mux); emc 546 drivers/memory/tegra/tegra20-emc.c err = clk_notifier_register(emc->clk, &emc->clk_nb); emc 554 drivers/memory/tegra/tegra20-emc.c err = emc_init(emc, emc->timings[emc->num_timings - 1].rate); emc 564 drivers/memory/tegra/tegra20-emc.c clk_notifier_unregister(emc->clk, &emc->clk_nb); emc 566 drivers/memory/tegra/tegra20-emc.c clk_put(emc->backup_clk); emc 568 drivers/memory/tegra/tegra20-emc.c clk_put(emc->pll_m); emc 969 drivers/s390/char/tape_3590.c switch (sense->fmt.f70.emc) { emc 993 drivers/s390/char/tape_3590.c sense->fmt.f70.emc); emc 1033 drivers/s390/char/tape_3590.c switch (sense->fmt.f71.emc) { emc 1063 drivers/s390/char/tape_3590.c sense->fmt.f71.emc); emc 1144 drivers/s390/char/tape_3590.c switch (sense->fmt.f71.emc) { emc 1172 drivers/s390/char/tape_3590.c sense->fmt.f71.emc); emc 1265 drivers/s390/char/tape_3590.c sense->fmt.f70.emc, sense->fmt.f70.smc, emc 1276 drivers/s390/char/tape_3590.c sense->mc, sense->fmt.f71.emc, sense->fmt.f71.smc, emc 1287 drivers/s390/char/tape_3590.c sense->mc, sense->fmt.f71.emc, sense->fmt.f71.smc, emc 93 drivers/s390/char/tape_3590.h unsigned int emc:4; emc 105 drivers/s390/char/tape_3590.h unsigned int emc:4; emc 11 include/soc/tegra/emc.h int tegra_emc_prepare_timing_change(struct tegra_emc *emc, emc 13 include/soc/tegra/emc.h void tegra_emc_complete_timing_change(struct tegra_emc *emc,