effective_lb_latency_hiding_source_lines_chroma  555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->effective_lb_latency_hiding_source_lines_chroma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0);
effective_lb_latency_hiding_source_lines_chroma  557 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 				v->effective_detlb_lines_chroma =dcn_bw_floor2(v->lines_in_det_chroma +dcn_bw_min2(v->lines_in_det_chroma * v->required_dispclk[i][j] * v->byte_per_pixel_in_detc[k] * v->pscl_factor_chroma[k] / v->return_bw_per_state[i], v->effective_lb_latency_hiding_source_lines_chroma), v->swath_height_cper_state[i][j][k]);
effective_lb_latency_hiding_source_lines_chroma 1426 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c 			v->effective_det_plus_lb_lines_chroma =dcn_bw_floor2(v->lines_in_detc[k] +dcn_bw_min2(v->lines_in_detc[k] * v->dppclk * v->byte_per_pixel_detc[k] * v->pscl_throughput_chroma[k] / (v->return_bw / v->dpp_per_plane[k]), v->effective_lb_latency_hiding_source_lines_chroma), v->swath_height_c[k]);
effective_lb_latency_hiding_source_lines_chroma  318 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h 	float effective_lb_latency_hiding_source_lines_chroma;