EdcReadEnable     119 drivers/gpu/drm/amd/powerplay/inc/smu71_discrete.h     uint8_t     EdcReadEnable;
EdcReadEnable     111 drivers/gpu/drm/amd/powerplay/inc/smu72_discrete.h 	uint8_t     EdcReadEnable;
EdcReadEnable     177 drivers/gpu/drm/amd/powerplay/inc/smu7_discrete.h     uint8_t     EdcReadEnable;
EdcReadEnable    1227 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	memory_level->EdcReadEnable = 0;
EdcReadEnable    1250 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 			memory_level->EdcReadEnable = 1;
EdcReadEnable    1509 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	table->MemoryACPILevel.EdcReadEnable = 0;
EdcReadEnable    1275 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	memory_level->EdcReadEnable = 0;
EdcReadEnable    1298 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 			memory_level->EdcReadEnable = 1;
EdcReadEnable    1557 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c 	table->MemoryACPILevel.EdcReadEnable = 0;
EdcReadEnable    1009 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	memory_level->EdcReadEnable = 0;
EdcReadEnable    1038 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 			memory_level->EdcReadEnable = 1;
EdcReadEnable    1300 drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c 	table->MemoryACPILevel.EdcReadEnable = 0;
EdcReadEnable    2923 drivers/gpu/drm/radeon/ci_dpm.c 	memory_level->EdcReadEnable = false;
EdcReadEnable    2945 drivers/gpu/drm/radeon/ci_dpm.c 			memory_level->EdcReadEnable = true;
EdcReadEnable    3097 drivers/gpu/drm/radeon/ci_dpm.c 	table->MemoryACPILevel.EdcReadEnable = false;
EdcReadEnable     177 drivers/gpu/drm/radeon/smu7_discrete.h     uint8_t     EdcReadEnable;