eepc              167 arch/mips/mm/cerr-sb1.c 	uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res;
eepc              192 arch/mips/mm/cerr-sb1.c 	  "=r" (dpahi), "=r" (dpalo), "=r" (eepc));
eepc              195 arch/mips/mm/cerr-sb1.c 	printk(" c0_errorepc ==	  %08x\n", eepc);
eepc              203 arch/mips/mm/cerr-sb1.c 			if (((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK)) &&
eepc              204 arch/mips/mm/cerr-sb1.c 			    ((eepc & SB1_CACHE_INDEX_MASK) != ((cerr_i & SB1_CACHE_INDEX_MASK) - 4)))