edp               131 arch/x86/boot/edd.c 	struct edd_info ei, *edp;
edp               147 arch/x86/boot/edd.c 	edp    = boot_params.eddbuf;
edp               167 arch/x86/boot/edd.c 			memcpy(edp, &ei, sizeof(ei));
edp               168 arch/x86/boot/edd.c 			edp++;
edp               692 drivers/gpu/drm/gma500/cdv_intel_display.c 		switch (dev_priv->edp.bpp) {
edp               529 drivers/gpu/drm/gma500/cdv_intel_dp.c 	    (cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp)
edp               911 drivers/gpu/drm/gma500/cdv_intel_dp.c 		bpp = dev_priv->edp.bpp;
edp              1015 drivers/gpu/drm/gma500/cdv_intel_dp.c 			bpp = dev_priv->edp.bpp;
edp              1142 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(intel_encoder);
edp              1144 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp) {
edp              1152 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1159 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(intel_encoder);
edp              1161 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1165 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1176 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(intel_encoder);
edp              1179 drivers/gpu/drm/gma500/cdv_intel_dp.c 		if (edp) {
edp              1185 drivers/gpu/drm/gma500/cdv_intel_dp.c 		if (edp) {
edp              1190 drivers/gpu/drm/gma500/cdv_intel_dp.c         	if (edp)
edp              1197 drivers/gpu/drm/gma500/cdv_intel_dp.c 		if (edp)
edp              1735 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(encoder);
edp              1739 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1743 drivers/gpu/drm/gma500/cdv_intel_dp.c 		if (edp)
edp              1757 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1769 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(intel_encoder);
edp              1785 drivers/gpu/drm/gma500/cdv_intel_dp.c 			if (edp && !intel_dp->panel_fixed_mode) {
edp              1825 drivers/gpu/drm/gma500/cdv_intel_dp.c 	int edp = is_edp(encoder);
edp              1827 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp              1835 drivers/gpu/drm/gma500/cdv_intel_dp.c 	if (edp)
edp                47 drivers/gpu/drm/gma500/intel_bios.c 	struct bdb_edp *edp;
edp                52 drivers/gpu/drm/gma500/intel_bios.c 	edp = find_section(bdb, BDB_EDP);
edp                54 drivers/gpu/drm/gma500/intel_bios.c 	dev_priv->edp.bpp = 18;
edp                55 drivers/gpu/drm/gma500/intel_bios.c 	if (!edp) {
edp                56 drivers/gpu/drm/gma500/intel_bios.c 		if (dev_priv->edp.support) {
edp                58 drivers/gpu/drm/gma500/intel_bios.c 				      dev_priv->edp.bpp);
edp                64 drivers/gpu/drm/gma500/intel_bios.c 	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
edp                66 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.bpp = 18;
edp                69 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.bpp = 24;
edp                72 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.bpp = 30;
edp                77 drivers/gpu/drm/gma500/intel_bios.c 	edp_pps = &edp->power_seqs[panel_type];
edp                78 drivers/gpu/drm/gma500/intel_bios.c 	edp_link_params = &edp->link_params[panel_type];
edp                80 drivers/gpu/drm/gma500/intel_bios.c 	dev_priv->edp.pps = *edp_pps;
edp                83 drivers/gpu/drm/gma500/intel_bios.c 				dev_priv->edp.pps.t1_t3, dev_priv->edp.pps.t8, 
edp                84 drivers/gpu/drm/gma500/intel_bios.c 				dev_priv->edp.pps.t9, dev_priv->edp.pps.t10,
edp                85 drivers/gpu/drm/gma500/intel_bios.c 				dev_priv->edp.pps.t11_t12);
edp                87 drivers/gpu/drm/gma500/intel_bios.c 	dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
edp                91 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.lanes = 1;
edp                94 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.lanes = 2;
edp                98 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.lanes = 4;
edp               102 drivers/gpu/drm/gma500/intel_bios.c 			dev_priv->edp.lanes, dev_priv->edp.rate, dev_priv->edp.bpp);
edp               106 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
edp               109 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
edp               112 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
edp               115 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
edp               120 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
edp               123 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
edp               126 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
edp               129 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
edp               133 drivers/gpu/drm/gma500/intel_bios.c 			dev_priv->edp.vswing, dev_priv->edp.preemphasis);
edp               424 drivers/gpu/drm/gma500/intel_bios.c 		dev_priv->edp.support = 1;
edp               608 drivers/gpu/drm/gma500/psb_drv.h 	} edp;
edp               570 drivers/gpu/drm/i915/display/intel_bios.c 	const struct bdb_edp *edp;
edp               575 drivers/gpu/drm/i915/display/intel_bios.c 	edp = find_section(bdb, BDB_EDP);
edp               576 drivers/gpu/drm/i915/display/intel_bios.c 	if (!edp)
edp               579 drivers/gpu/drm/i915/display/intel_bios.c 	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
edp               581 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.bpp = 18;
edp               584 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.bpp = 24;
edp               587 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.bpp = 30;
edp               592 drivers/gpu/drm/i915/display/intel_bios.c 	edp_pps = &edp->power_seqs[panel_type];
edp               593 drivers/gpu/drm/i915/display/intel_bios.c 	edp_link_params = &edp->fast_link_params[panel_type];
edp               595 drivers/gpu/drm/i915/display/intel_bios.c 	dev_priv->vbt.edp.pps = *edp_pps;
edp               599 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
edp               602 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
edp               612 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.lanes = 1;
edp               615 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.lanes = 2;
edp               618 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.lanes = 4;
edp               628 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
edp               631 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
edp               634 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
edp               637 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
edp               647 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
edp               650 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
edp               653 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
edp               656 drivers/gpu/drm/i915/display/intel_bios.c 		dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
edp               669 drivers/gpu/drm/i915/display/intel_bios.c 			dev_priv->vbt.edp.low_vswing =
edp               672 drivers/gpu/drm/i915/display/intel_bios.c 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
edp               673 drivers/gpu/drm/i915/display/intel_bios.c 			dev_priv->vbt.edp.low_vswing = vswing == 0;
edp               592 drivers/gpu/drm/i915/display/intel_ddi.c 	if (dev_priv->vbt.edp.low_vswing) {
edp               634 drivers/gpu/drm/i915/display/intel_ddi.c 	if (dev_priv->vbt.edp.low_vswing) {
edp               767 drivers/gpu/drm/i915/display/intel_ddi.c 	if (dev_priv->vbt.edp.low_vswing) {
edp               829 drivers/gpu/drm/i915/display/intel_ddi.c 	if (dev_priv->vbt.edp.low_vswing) {
edp               859 drivers/gpu/drm/i915/display/intel_ddi.c 	} else if (type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.low_vswing) {
edp              3912 drivers/gpu/drm/i915/display/intel_ddi.c 	if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.bpp &&
edp              3913 drivers/gpu/drm/i915/display/intel_ddi.c 	    pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
edp              3928 drivers/gpu/drm/i915/display/intel_ddi.c 			      pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
edp              3929 drivers/gpu/drm/i915/display/intel_ddi.c 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
edp              1883 drivers/gpu/drm/i915/display/intel_dp.c 		    dev_priv->vbt.edp.bpp && dev_priv->vbt.edp.bpp < bpp) {
edp              1885 drivers/gpu/drm/i915/display/intel_dp.c 				      dev_priv->vbt.edp.bpp);
edp              1886 drivers/gpu/drm/i915/display/intel_dp.c 			bpp = dev_priv->vbt.edp.bpp;
edp              3205 drivers/gpu/drm/i915/display/intel_dp.c 	if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp &&
edp              3206 drivers/gpu/drm/i915/display/intel_dp.c 	    pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
edp              3221 drivers/gpu/drm/i915/display/intel_dp.c 			      pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
edp              3222 drivers/gpu/drm/i915/display/intel_dp.c 		dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
edp              6453 drivers/gpu/drm/i915/display/intel_dp.c 	vbt = dev_priv->vbt.edp.pps;
edp              4395 drivers/gpu/drm/i915/i915_debugfs.c 	bool edp;
edp              4427 drivers/gpu/drm/i915/i915_debugfs.c 		if (b->edp &&
edp               777 drivers/gpu/drm/i915/i915_drv.h 	} edp;
edp               390 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 		if (!priv->edp)
edp               405 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c 		ret = msm_edp_modeset_init(priv->edp, dev, encoder);
edp                11 drivers/gpu/drm/msm/edp/edp.c 	struct msm_edp *edp = dev_id;
edp                14 drivers/gpu/drm/msm/edp/edp.c 	return msm_edp_ctrl_irq(edp->ctrl);
edp                19 drivers/gpu/drm/msm/edp/edp.c 	struct msm_edp *edp = platform_get_drvdata(pdev);
edp                21 drivers/gpu/drm/msm/edp/edp.c 	if (!edp)
edp                24 drivers/gpu/drm/msm/edp/edp.c 	if (edp->ctrl) {
edp                25 drivers/gpu/drm/msm/edp/edp.c 		msm_edp_ctrl_destroy(edp->ctrl);
edp                26 drivers/gpu/drm/msm/edp/edp.c 		edp->ctrl = NULL;
edp                35 drivers/gpu/drm/msm/edp/edp.c 	struct msm_edp *edp = NULL;
edp                44 drivers/gpu/drm/msm/edp/edp.c 	edp = devm_kzalloc(&pdev->dev, sizeof(*edp), GFP_KERNEL);
edp                45 drivers/gpu/drm/msm/edp/edp.c 	if (!edp) {
edp                49 drivers/gpu/drm/msm/edp/edp.c 	DBG("eDP probed=%p", edp);
edp                51 drivers/gpu/drm/msm/edp/edp.c 	edp->pdev = pdev;
edp                52 drivers/gpu/drm/msm/edp/edp.c 	platform_set_drvdata(pdev, edp);
edp                54 drivers/gpu/drm/msm/edp/edp.c 	ret = msm_edp_ctrl_init(edp);
edp                58 drivers/gpu/drm/msm/edp/edp.c 	return edp;
edp                61 drivers/gpu/drm/msm/edp/edp.c 	if (edp)
edp                71 drivers/gpu/drm/msm/edp/edp.c 	struct msm_edp *edp;
edp                74 drivers/gpu/drm/msm/edp/edp.c 	edp = edp_init(to_platform_device(dev));
edp                75 drivers/gpu/drm/msm/edp/edp.c 	if (IS_ERR(edp))
edp                76 drivers/gpu/drm/msm/edp/edp.c 		return PTR_ERR(edp);
edp                77 drivers/gpu/drm/msm/edp/edp.c 	priv->edp = edp;
edp                88 drivers/gpu/drm/msm/edp/edp.c 	if (priv->edp) {
edp                90 drivers/gpu/drm/msm/edp/edp.c 		priv->edp = NULL;
edp               139 drivers/gpu/drm/msm/edp/edp.c int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
edp               142 drivers/gpu/drm/msm/edp/edp.c 	struct platform_device *pdev = edp->pdev;
edp               146 drivers/gpu/drm/msm/edp/edp.c 	edp->encoder = encoder;
edp               147 drivers/gpu/drm/msm/edp/edp.c 	edp->dev = dev;
edp               149 drivers/gpu/drm/msm/edp/edp.c 	edp->bridge = msm_edp_bridge_init(edp);
edp               150 drivers/gpu/drm/msm/edp/edp.c 	if (IS_ERR(edp->bridge)) {
edp               151 drivers/gpu/drm/msm/edp/edp.c 		ret = PTR_ERR(edp->bridge);
edp               153 drivers/gpu/drm/msm/edp/edp.c 		edp->bridge = NULL;
edp               157 drivers/gpu/drm/msm/edp/edp.c 	edp->connector = msm_edp_connector_init(edp);
edp               158 drivers/gpu/drm/msm/edp/edp.c 	if (IS_ERR(edp->connector)) {
edp               159 drivers/gpu/drm/msm/edp/edp.c 		ret = PTR_ERR(edp->connector);
edp               161 drivers/gpu/drm/msm/edp/edp.c 		edp->connector = NULL;
edp               165 drivers/gpu/drm/msm/edp/edp.c 	edp->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
edp               166 drivers/gpu/drm/msm/edp/edp.c 	if (edp->irq < 0) {
edp               167 drivers/gpu/drm/msm/edp/edp.c 		ret = edp->irq;
edp               172 drivers/gpu/drm/msm/edp/edp.c 	ret = devm_request_irq(&pdev->dev, edp->irq,
edp               174 drivers/gpu/drm/msm/edp/edp.c 			"edp_isr", edp);
edp               177 drivers/gpu/drm/msm/edp/edp.c 				edp->irq, ret);
edp               181 drivers/gpu/drm/msm/edp/edp.c 	encoder->bridge = edp->bridge;
edp               183 drivers/gpu/drm/msm/edp/edp.c 	priv->bridges[priv->num_bridges++]       = edp->bridge;
edp               184 drivers/gpu/drm/msm/edp/edp.c 	priv->connectors[priv->num_connectors++] = edp->connector;
edp               190 drivers/gpu/drm/msm/edp/edp.c 	if (edp->bridge) {
edp               191 drivers/gpu/drm/msm/edp/edp.c 		edp_bridge_destroy(edp->bridge);
edp               192 drivers/gpu/drm/msm/edp/edp.c 		edp->bridge = NULL;
edp               194 drivers/gpu/drm/msm/edp/edp.c 	if (edp->connector) {
edp               195 drivers/gpu/drm/msm/edp/edp.c 		edp->connector->funcs->destroy(edp->connector);
edp               196 drivers/gpu/drm/msm/edp/edp.c 		edp->connector = NULL;
edp                41 drivers/gpu/drm/msm/edp/edp.h struct drm_bridge *msm_edp_bridge_init(struct msm_edp *edp);
edp                45 drivers/gpu/drm/msm/edp/edp.h struct drm_connector *msm_edp_connector_init(struct msm_edp *edp);
edp                65 drivers/gpu/drm/msm/edp/edp.h int msm_edp_ctrl_init(struct msm_edp *edp);
edp                10 drivers/gpu/drm/msm/edp/edp_bridge.c 	struct msm_edp *edp;
edp                21 drivers/gpu/drm/msm/edp/edp_bridge.c 	struct msm_edp *edp = edp_bridge->edp;
edp                24 drivers/gpu/drm/msm/edp/edp_bridge.c 	msm_edp_ctrl_power(edp->ctrl, true);
edp                40 drivers/gpu/drm/msm/edp/edp_bridge.c 	struct msm_edp *edp = edp_bridge->edp;
edp                43 drivers/gpu/drm/msm/edp/edp_bridge.c 	msm_edp_ctrl_power(edp->ctrl, false);
edp                53 drivers/gpu/drm/msm/edp/edp_bridge.c 	struct msm_edp *edp = edp_bridge->edp;
edp                60 drivers/gpu/drm/msm/edp/edp_bridge.c 			msm_edp_ctrl_timing_cfg(edp->ctrl,
edp                76 drivers/gpu/drm/msm/edp/edp_bridge.c struct drm_bridge *msm_edp_bridge_init(struct msm_edp *edp)
edp                82 drivers/gpu/drm/msm/edp/edp_bridge.c 	edp_bridge = devm_kzalloc(edp->dev->dev,
edp                89 drivers/gpu/drm/msm/edp/edp_bridge.c 	edp_bridge->edp = edp;
edp                94 drivers/gpu/drm/msm/edp/edp_bridge.c 	ret = drm_bridge_attach(edp->encoder, bridge, NULL);
edp                12 drivers/gpu/drm/msm/edp/edp_connector.c 	struct msm_edp *edp;
edp                20 drivers/gpu/drm/msm/edp/edp_connector.c 	struct msm_edp *edp = edp_connector->edp;
edp                23 drivers/gpu/drm/msm/edp/edp_connector.c 	return msm_edp_ctrl_panel_connected(edp->ctrl) ?
edp                41 drivers/gpu/drm/msm/edp/edp_connector.c 	struct msm_edp *edp = edp_connector->edp;
edp                47 drivers/gpu/drm/msm/edp/edp_connector.c 	ret = msm_edp_ctrl_get_panel_info(edp->ctrl, connector, &drm_edid);
edp                62 drivers/gpu/drm/msm/edp/edp_connector.c 	struct msm_edp *edp = edp_connector->edp;
edp                69 drivers/gpu/drm/msm/edp/edp_connector.c 			requested, edp_connector->edp->encoder);
edp                76 drivers/gpu/drm/msm/edp/edp_connector.c 		edp->ctrl, mode->clock, NULL, NULL))
edp               101 drivers/gpu/drm/msm/edp/edp_connector.c struct drm_connector *msm_edp_connector_init(struct msm_edp *edp)
edp               111 drivers/gpu/drm/msm/edp/edp_connector.c 	edp_connector->edp = edp;
edp               115 drivers/gpu/drm/msm/edp/edp_connector.c 	ret = drm_connector_init(edp->dev, connector, &edp_connector_funcs,
edp               129 drivers/gpu/drm/msm/edp/edp_connector.c 	drm_connector_attach_encoder(connector, edp->encoder);
edp              1082 drivers/gpu/drm/msm/edp/edp_ctrl.c int msm_edp_ctrl_init(struct msm_edp *edp)
edp              1085 drivers/gpu/drm/msm/edp/edp_ctrl.c 	struct device *dev = &edp->pdev->dev;
edp              1088 drivers/gpu/drm/msm/edp/edp_ctrl.c 	if (!edp) {
edp              1097 drivers/gpu/drm/msm/edp/edp_ctrl.c 	edp->ctrl = ctrl;
edp              1098 drivers/gpu/drm/msm/edp/edp_ctrl.c 	ctrl->pdev = edp->pdev;
edp               157 drivers/gpu/drm/msm/msm_drv.h 	struct msm_edp *edp;
edp               354 drivers/gpu/drm/msm/msm_drv.h int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,