edmac             217 drivers/dma/ep93xx_dma.c static inline struct device *chan2dev(struct ep93xx_dma_chan *edmac)
edmac             219 drivers/dma/ep93xx_dma.c 	return &edmac->chan.dev->device;
edmac             238 drivers/dma/ep93xx_dma.c static void ep93xx_dma_set_active(struct ep93xx_dma_chan *edmac,
edmac             241 drivers/dma/ep93xx_dma.c 	BUG_ON(!list_empty(&edmac->active));
edmac             243 drivers/dma/ep93xx_dma.c 	list_add_tail(&desc->node, &edmac->active);
edmac             259 drivers/dma/ep93xx_dma.c 		list_move_tail(&d->node, &edmac->active);
edmac             265 drivers/dma/ep93xx_dma.c ep93xx_dma_get_active(struct ep93xx_dma_chan *edmac)
edmac             267 drivers/dma/ep93xx_dma.c 	return list_first_entry_or_null(&edmac->active,
edmac             283 drivers/dma/ep93xx_dma.c static bool ep93xx_dma_advance_active(struct ep93xx_dma_chan *edmac)
edmac             287 drivers/dma/ep93xx_dma.c 	list_rotate_left(&edmac->active);
edmac             289 drivers/dma/ep93xx_dma.c 	if (test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags))
edmac             292 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             307 drivers/dma/ep93xx_dma.c static void m2p_set_control(struct ep93xx_dma_chan *edmac, u32 control)
edmac             309 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2P_CONTROL);
edmac             314 drivers/dma/ep93xx_dma.c 	readl(edmac->regs + M2P_CONTROL);
edmac             317 drivers/dma/ep93xx_dma.c static int m2p_hw_setup(struct ep93xx_dma_chan *edmac)
edmac             319 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_data *data = edmac->chan.private;
edmac             322 drivers/dma/ep93xx_dma.c 	writel(data->port & 0xf, edmac->regs + M2P_PPALLOC);
edmac             326 drivers/dma/ep93xx_dma.c 	m2p_set_control(edmac, control);
edmac             328 drivers/dma/ep93xx_dma.c 	edmac->buffer = 0;
edmac             333 drivers/dma/ep93xx_dma.c static inline u32 m2p_channel_state(struct ep93xx_dma_chan *edmac)
edmac             335 drivers/dma/ep93xx_dma.c 	return (readl(edmac->regs + M2P_STATUS) >> 4) & 0x3;
edmac             338 drivers/dma/ep93xx_dma.c static void m2p_hw_synchronize(struct ep93xx_dma_chan *edmac)
edmac             343 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac             344 drivers/dma/ep93xx_dma.c 	control = readl(edmac->regs + M2P_CONTROL);
edmac             346 drivers/dma/ep93xx_dma.c 	m2p_set_control(edmac, control);
edmac             347 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac             349 drivers/dma/ep93xx_dma.c 	while (m2p_channel_state(edmac) >= M2P_STATE_ON)
edmac             353 drivers/dma/ep93xx_dma.c static void m2p_hw_shutdown(struct ep93xx_dma_chan *edmac)
edmac             355 drivers/dma/ep93xx_dma.c 	m2p_set_control(edmac, 0);
edmac             357 drivers/dma/ep93xx_dma.c 	while (m2p_channel_state(edmac) != M2P_STATE_IDLE)
edmac             358 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac), "M2P: Not yet IDLE\n");
edmac             361 drivers/dma/ep93xx_dma.c static void m2p_fill_desc(struct ep93xx_dma_chan *edmac)
edmac             366 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             368 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac), "M2P: empty descriptor list\n");
edmac             372 drivers/dma/ep93xx_dma.c 	if (ep93xx_dma_chan_direction(&edmac->chan) == DMA_MEM_TO_DEV)
edmac             377 drivers/dma/ep93xx_dma.c 	if (edmac->buffer == 0) {
edmac             378 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2P_MAXCNT0);
edmac             379 drivers/dma/ep93xx_dma.c 		writel(bus_addr, edmac->regs + M2P_BASE0);
edmac             381 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2P_MAXCNT1);
edmac             382 drivers/dma/ep93xx_dma.c 		writel(bus_addr, edmac->regs + M2P_BASE1);
edmac             385 drivers/dma/ep93xx_dma.c 	edmac->buffer ^= 1;
edmac             388 drivers/dma/ep93xx_dma.c static void m2p_hw_submit(struct ep93xx_dma_chan *edmac)
edmac             390 drivers/dma/ep93xx_dma.c 	u32 control = readl(edmac->regs + M2P_CONTROL);
edmac             392 drivers/dma/ep93xx_dma.c 	m2p_fill_desc(edmac);
edmac             395 drivers/dma/ep93xx_dma.c 	if (ep93xx_dma_advance_active(edmac)) {
edmac             396 drivers/dma/ep93xx_dma.c 		m2p_fill_desc(edmac);
edmac             400 drivers/dma/ep93xx_dma.c 	m2p_set_control(edmac, control);
edmac             403 drivers/dma/ep93xx_dma.c static int m2p_hw_interrupt(struct ep93xx_dma_chan *edmac)
edmac             405 drivers/dma/ep93xx_dma.c 	u32 irq_status = readl(edmac->regs + M2P_INTERRUPT);
edmac             409 drivers/dma/ep93xx_dma.c 		struct ep93xx_dma_desc *desc = ep93xx_dma_get_active(edmac);
edmac             412 drivers/dma/ep93xx_dma.c 		writel(1, edmac->regs + M2P_INTERRUPT);
edmac             422 drivers/dma/ep93xx_dma.c 		dev_err(chan2dev(edmac),
edmac             440 drivers/dma/ep93xx_dma.c 	if (ep93xx_dma_advance_active(edmac)) {
edmac             441 drivers/dma/ep93xx_dma.c 		m2p_fill_desc(edmac);
edmac             446 drivers/dma/ep93xx_dma.c 	control = readl(edmac->regs + M2P_CONTROL);
edmac             448 drivers/dma/ep93xx_dma.c 	m2p_set_control(edmac, control);
edmac             457 drivers/dma/ep93xx_dma.c static int m2m_hw_setup(struct ep93xx_dma_chan *edmac)
edmac             459 drivers/dma/ep93xx_dma.c 	const struct ep93xx_dma_data *data = edmac->chan.private;
edmac             464 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
edmac             514 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2M_CONTROL);
edmac             518 drivers/dma/ep93xx_dma.c static void m2m_hw_shutdown(struct ep93xx_dma_chan *edmac)
edmac             521 drivers/dma/ep93xx_dma.c 	writel(0, edmac->regs + M2M_CONTROL);
edmac             524 drivers/dma/ep93xx_dma.c static void m2m_fill_desc(struct ep93xx_dma_chan *edmac)
edmac             528 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             530 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac), "M2M: empty descriptor list\n");
edmac             534 drivers/dma/ep93xx_dma.c 	if (edmac->buffer == 0) {
edmac             535 drivers/dma/ep93xx_dma.c 		writel(desc->src_addr, edmac->regs + M2M_SAR_BASE0);
edmac             536 drivers/dma/ep93xx_dma.c 		writel(desc->dst_addr, edmac->regs + M2M_DAR_BASE0);
edmac             537 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2M_BCR0);
edmac             539 drivers/dma/ep93xx_dma.c 		writel(desc->src_addr, edmac->regs + M2M_SAR_BASE1);
edmac             540 drivers/dma/ep93xx_dma.c 		writel(desc->dst_addr, edmac->regs + M2M_DAR_BASE1);
edmac             541 drivers/dma/ep93xx_dma.c 		writel(desc->size, edmac->regs + M2M_BCR1);
edmac             544 drivers/dma/ep93xx_dma.c 	edmac->buffer ^= 1;
edmac             547 drivers/dma/ep93xx_dma.c static void m2m_hw_submit(struct ep93xx_dma_chan *edmac)
edmac             549 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_data *data = edmac->chan.private;
edmac             550 drivers/dma/ep93xx_dma.c 	u32 control = readl(edmac->regs + M2M_CONTROL);
edmac             558 drivers/dma/ep93xx_dma.c 	control |= edmac->runtime_ctrl;
edmac             560 drivers/dma/ep93xx_dma.c 	m2m_fill_desc(edmac);
edmac             563 drivers/dma/ep93xx_dma.c 	if (ep93xx_dma_advance_active(edmac)) {
edmac             564 drivers/dma/ep93xx_dma.c 		m2m_fill_desc(edmac);
edmac             573 drivers/dma/ep93xx_dma.c 	writel(control, edmac->regs + M2M_CONTROL);
edmac             581 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
edmac             595 drivers/dma/ep93xx_dma.c static int m2m_hw_interrupt(struct ep93xx_dma_chan *edmac)
edmac             597 drivers/dma/ep93xx_dma.c 	u32 status = readl(edmac->regs + M2M_STATUS);
edmac             606 drivers/dma/ep93xx_dma.c 	if (!(readl(edmac->regs + M2M_INTERRUPT) & M2M_INTERRUPT_MASK))
edmac             611 drivers/dma/ep93xx_dma.c 		writel(0, edmac->regs + M2M_INTERRUPT);
edmac             618 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             635 drivers/dma/ep93xx_dma.c 		if (ep93xx_dma_advance_active(edmac)) {
edmac             636 drivers/dma/ep93xx_dma.c 			m2m_fill_desc(edmac);
edmac             637 drivers/dma/ep93xx_dma.c 			if (done && !edmac->chan.private) {
edmac             639 drivers/dma/ep93xx_dma.c 				control = readl(edmac->regs + M2M_CONTROL);
edmac             641 drivers/dma/ep93xx_dma.c 				writel(control, edmac->regs + M2M_CONTROL);
edmac             657 drivers/dma/ep93xx_dma.c 		control = readl(edmac->regs + M2M_CONTROL);
edmac             660 drivers/dma/ep93xx_dma.c 		writel(control, edmac->regs + M2M_CONTROL);
edmac             675 drivers/dma/ep93xx_dma.c ep93xx_dma_desc_get(struct ep93xx_dma_chan *edmac)
edmac             681 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac             682 drivers/dma/ep93xx_dma.c 	list_for_each_entry_safe(desc, _desc, &edmac->free_list, node) {
edmac             699 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac             703 drivers/dma/ep93xx_dma.c static void ep93xx_dma_desc_put(struct ep93xx_dma_chan *edmac,
edmac             709 drivers/dma/ep93xx_dma.c 		spin_lock_irqsave(&edmac->lock, flags);
edmac             710 drivers/dma/ep93xx_dma.c 		list_splice_init(&desc->tx_list, &edmac->free_list);
edmac             711 drivers/dma/ep93xx_dma.c 		list_add(&desc->node, &edmac->free_list);
edmac             712 drivers/dma/ep93xx_dma.c 		spin_unlock_irqrestore(&edmac->lock, flags);
edmac             724 drivers/dma/ep93xx_dma.c static void ep93xx_dma_advance_work(struct ep93xx_dma_chan *edmac)
edmac             729 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac             730 drivers/dma/ep93xx_dma.c 	if (!list_empty(&edmac->active) || list_empty(&edmac->queue)) {
edmac             731 drivers/dma/ep93xx_dma.c 		spin_unlock_irqrestore(&edmac->lock, flags);
edmac             736 drivers/dma/ep93xx_dma.c 	new = list_first_entry(&edmac->queue, struct ep93xx_dma_desc, node);
edmac             739 drivers/dma/ep93xx_dma.c 	ep93xx_dma_set_active(edmac, new);
edmac             742 drivers/dma/ep93xx_dma.c 	edmac->edma->hw_submit(edmac);
edmac             743 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac             748 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = (struct ep93xx_dma_chan *)data;
edmac             754 drivers/dma/ep93xx_dma.c 	spin_lock_irq(&edmac->lock);
edmac             760 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             764 drivers/dma/ep93xx_dma.c 			if (!test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags))
edmac             766 drivers/dma/ep93xx_dma.c 			list_splice_init(&edmac->active, &list);
edmac             770 drivers/dma/ep93xx_dma.c 	spin_unlock_irq(&edmac->lock);
edmac             773 drivers/dma/ep93xx_dma.c 	ep93xx_dma_advance_work(edmac);
edmac             778 drivers/dma/ep93xx_dma.c 		ep93xx_dma_desc_put(edmac, desc);
edmac             786 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = dev_id;
edmac             790 drivers/dma/ep93xx_dma.c 	spin_lock(&edmac->lock);
edmac             792 drivers/dma/ep93xx_dma.c 	desc = ep93xx_dma_get_active(edmac);
edmac             794 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac),
edmac             796 drivers/dma/ep93xx_dma.c 		spin_unlock(&edmac->lock);
edmac             800 drivers/dma/ep93xx_dma.c 	switch (edmac->edma->hw_interrupt(edmac)) {
edmac             803 drivers/dma/ep93xx_dma.c 		tasklet_schedule(&edmac->tasklet);
edmac             807 drivers/dma/ep93xx_dma.c 		if (test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags))
edmac             808 drivers/dma/ep93xx_dma.c 			tasklet_schedule(&edmac->tasklet);
edmac             812 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac), "unknown interrupt!\n");
edmac             817 drivers/dma/ep93xx_dma.c 	spin_unlock(&edmac->lock);
edmac             831 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(tx->chan);
edmac             836 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac             846 drivers/dma/ep93xx_dma.c 	if (list_empty(&edmac->active)) {
edmac             847 drivers/dma/ep93xx_dma.c 		ep93xx_dma_set_active(edmac, desc);
edmac             848 drivers/dma/ep93xx_dma.c 		edmac->edma->hw_submit(edmac);
edmac             850 drivers/dma/ep93xx_dma.c 		list_add_tail(&desc->node, &edmac->queue);
edmac             853 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac             867 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac             873 drivers/dma/ep93xx_dma.c 	if (!edmac->edma->m2m) {
edmac             898 drivers/dma/ep93xx_dma.c 	ret = clk_enable(edmac->clk);
edmac             902 drivers/dma/ep93xx_dma.c 	ret = request_irq(edmac->irq, ep93xx_dma_interrupt, 0, name, edmac);
edmac             906 drivers/dma/ep93xx_dma.c 	spin_lock_irq(&edmac->lock);
edmac             907 drivers/dma/ep93xx_dma.c 	dma_cookie_init(&edmac->chan);
edmac             908 drivers/dma/ep93xx_dma.c 	ret = edmac->edma->hw_setup(edmac);
edmac             909 drivers/dma/ep93xx_dma.c 	spin_unlock_irq(&edmac->lock);
edmac             919 drivers/dma/ep93xx_dma.c 			dev_warn(chan2dev(edmac), "not enough descriptors\n");
edmac             929 drivers/dma/ep93xx_dma.c 		ep93xx_dma_desc_put(edmac, desc);
edmac             935 drivers/dma/ep93xx_dma.c 	free_irq(edmac->irq, edmac);
edmac             937 drivers/dma/ep93xx_dma.c 	clk_disable(edmac->clk);
edmac             951 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac             956 drivers/dma/ep93xx_dma.c 	BUG_ON(!list_empty(&edmac->active));
edmac             957 drivers/dma/ep93xx_dma.c 	BUG_ON(!list_empty(&edmac->queue));
edmac             959 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac             960 drivers/dma/ep93xx_dma.c 	edmac->edma->hw_shutdown(edmac);
edmac             961 drivers/dma/ep93xx_dma.c 	edmac->runtime_addr = 0;
edmac             962 drivers/dma/ep93xx_dma.c 	edmac->runtime_ctrl = 0;
edmac             963 drivers/dma/ep93xx_dma.c 	edmac->buffer = 0;
edmac             964 drivers/dma/ep93xx_dma.c 	list_splice_init(&edmac->free_list, &list);
edmac             965 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac             970 drivers/dma/ep93xx_dma.c 	clk_disable(edmac->clk);
edmac             971 drivers/dma/ep93xx_dma.c 	free_irq(edmac->irq, edmac);
edmac             988 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac             994 drivers/dma/ep93xx_dma.c 		desc = ep93xx_dma_desc_get(edmac);
edmac             996 drivers/dma/ep93xx_dma.c 			dev_warn(chan2dev(edmac), "couldn't get descriptor\n");
edmac            1017 drivers/dma/ep93xx_dma.c 	ep93xx_dma_desc_put(edmac, first);
edmac            1037 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1042 drivers/dma/ep93xx_dma.c 	if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) {
edmac            1043 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac),
edmac            1048 drivers/dma/ep93xx_dma.c 	if (test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags)) {
edmac            1049 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac),
edmac            1054 drivers/dma/ep93xx_dma.c 	ep93xx_dma_slave_config_write(chan, dir, &edmac->slave_config);
edmac            1061 drivers/dma/ep93xx_dma.c 			dev_warn(chan2dev(edmac), "too big transfer size %zu\n",
edmac            1066 drivers/dma/ep93xx_dma.c 		desc = ep93xx_dma_desc_get(edmac);
edmac            1068 drivers/dma/ep93xx_dma.c 			dev_warn(chan2dev(edmac), "couldn't get descriptor\n");
edmac            1074 drivers/dma/ep93xx_dma.c 			desc->dst_addr = edmac->runtime_addr;
edmac            1076 drivers/dma/ep93xx_dma.c 			desc->src_addr = edmac->runtime_addr;
edmac            1093 drivers/dma/ep93xx_dma.c 	ep93xx_dma_desc_put(edmac, first);
edmac            1119 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1123 drivers/dma/ep93xx_dma.c 	if (!edmac->edma->m2m && dir != ep93xx_dma_chan_direction(chan)) {
edmac            1124 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac),
edmac            1129 drivers/dma/ep93xx_dma.c 	if (test_and_set_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags)) {
edmac            1130 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac),
edmac            1136 drivers/dma/ep93xx_dma.c 		dev_warn(chan2dev(edmac), "too big period length %zu\n",
edmac            1141 drivers/dma/ep93xx_dma.c 	ep93xx_dma_slave_config_write(chan, dir, &edmac->slave_config);
edmac            1146 drivers/dma/ep93xx_dma.c 		desc = ep93xx_dma_desc_get(edmac);
edmac            1148 drivers/dma/ep93xx_dma.c 			dev_warn(chan2dev(edmac), "couldn't get descriptor\n");
edmac            1154 drivers/dma/ep93xx_dma.c 			desc->dst_addr = edmac->runtime_addr;
edmac            1156 drivers/dma/ep93xx_dma.c 			desc->src_addr = edmac->runtime_addr;
edmac            1173 drivers/dma/ep93xx_dma.c 	ep93xx_dma_desc_put(edmac, first);
edmac            1191 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1193 drivers/dma/ep93xx_dma.c 	if (edmac->edma->hw_synchronize)
edmac            1194 drivers/dma/ep93xx_dma.c 		edmac->edma->hw_synchronize(edmac);
edmac            1206 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1211 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac            1213 drivers/dma/ep93xx_dma.c 	edmac->edma->hw_shutdown(edmac);
edmac            1214 drivers/dma/ep93xx_dma.c 	clear_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags);
edmac            1215 drivers/dma/ep93xx_dma.c 	list_splice_init(&edmac->active, &list);
edmac            1216 drivers/dma/ep93xx_dma.c 	list_splice_init(&edmac->queue, &list);
edmac            1221 drivers/dma/ep93xx_dma.c 	edmac->edma->hw_setup(edmac);
edmac            1222 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac            1225 drivers/dma/ep93xx_dma.c 		ep93xx_dma_desc_put(edmac, desc);
edmac            1233 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1235 drivers/dma/ep93xx_dma.c 	memcpy(&edmac->slave_config, config, sizeof(*config));
edmac            1244 drivers/dma/ep93xx_dma.c 	struct ep93xx_dma_chan *edmac = to_ep93xx_dma_chan(chan);
edmac            1249 drivers/dma/ep93xx_dma.c 	if (!edmac->edma->m2m)
edmac            1281 drivers/dma/ep93xx_dma.c 	spin_lock_irqsave(&edmac->lock, flags);
edmac            1282 drivers/dma/ep93xx_dma.c 	edmac->runtime_addr = addr;
edmac            1283 drivers/dma/ep93xx_dma.c 	edmac->runtime_ctrl = ctrl;
edmac            1284 drivers/dma/ep93xx_dma.c 	spin_unlock_irqrestore(&edmac->lock, flags);
edmac            1336 drivers/dma/ep93xx_dma.c 		struct ep93xx_dma_chan *edmac = &edma->channels[i];
edmac            1338 drivers/dma/ep93xx_dma.c 		edmac->chan.device = dma_dev;
edmac            1339 drivers/dma/ep93xx_dma.c 		edmac->regs = cdata->base;
edmac            1340 drivers/dma/ep93xx_dma.c 		edmac->irq = cdata->irq;
edmac            1341 drivers/dma/ep93xx_dma.c 		edmac->edma = edma;
edmac            1343 drivers/dma/ep93xx_dma.c 		edmac->clk = clk_get(NULL, cdata->name);
edmac            1344 drivers/dma/ep93xx_dma.c 		if (IS_ERR(edmac->clk)) {
edmac            1350 drivers/dma/ep93xx_dma.c 		spin_lock_init(&edmac->lock);
edmac            1351 drivers/dma/ep93xx_dma.c 		INIT_LIST_HEAD(&edmac->active);
edmac            1352 drivers/dma/ep93xx_dma.c 		INIT_LIST_HEAD(&edmac->queue);
edmac            1353 drivers/dma/ep93xx_dma.c 		INIT_LIST_HEAD(&edmac->free_list);
edmac            1354 drivers/dma/ep93xx_dma.c 		tasklet_init(&edmac->tasklet, ep93xx_dma_tasklet,
edmac            1355 drivers/dma/ep93xx_dma.c 			     (unsigned long)edmac);
edmac            1357 drivers/dma/ep93xx_dma.c 		list_add_tail(&edmac->chan.device_node,
edmac            1399 drivers/dma/ep93xx_dma.c 			struct ep93xx_dma_chan *edmac = &edma->channels[i];
edmac            1400 drivers/dma/ep93xx_dma.c 			if (!IS_ERR_OR_NULL(edmac->clk))
edmac            1401 drivers/dma/ep93xx_dma.c 				clk_put(edmac->clk);