ecclk 561 drivers/gpu/drm/amd/amdgpu/amdgpu.h int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk); ecclk 516 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = ecclk 532 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c adev->pm.dpm.vce_states[i].ecclk = ecclk 64 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 ecclk; ecclk 173 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h u32 ecclk; ecclk 1347 drivers/gpu/drm/amd/amdgpu/cik.c static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) ecclk 1355 drivers/gpu/drm/amd/amdgpu/cik.c ecclk, false, ÷rs); ecclk 2222 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; ecclk 2225 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->ecclk = 0; ecclk 2289 drivers/gpu/drm/amd/amdgpu/kv_dpm.c new_rps->evclk || new_rps->ecclk; ecclk 3275 drivers/gpu/drm/amd/amdgpu/kv_dpm.c *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); ecclk 338 drivers/gpu/drm/amd/amdgpu/nv.c static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) ecclk 3036 drivers/gpu/drm/amd/amdgpu/si_dpm.c u32 evclk, u32 ecclk, u16 *voltage) ecclk 3043 drivers/gpu/drm/amd/amdgpu/si_dpm.c if (((evclk == 0) && (ecclk == 0)) || ecclk 3051 drivers/gpu/drm/amd/amdgpu/si_dpm.c (ecclk <= table->entries[i].ecclk)) { ecclk 3468 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; ecclk 3469 drivers/gpu/drm/amd/amdgpu/si_dpm.c si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, ecclk 3473 drivers/gpu/drm/amd/amdgpu/si_dpm.c rps->ecclk = 0; ecclk 7978 drivers/gpu/drm/amd/amdgpu/si_dpm.c *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); ecclk 618 drivers/gpu/drm/amd/amdgpu/soc15.c static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) ecclk 796 drivers/gpu/drm/amd/amdgpu/vi.c static int vi_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) ecclk 820 drivers/gpu/drm/amd/amdgpu/vi.c ecclk, false, ÷rs); ecclk 32 drivers/gpu/drm/amd/include/kgd_pp_interface.h u32 ecclk; ecclk 1260 drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c vce_state->ecclk = le32_to_cpu(mm_dep_record->ulEClk); ecclk 1163 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c vce_table->entries[i].ecclk = ((unsigned long)entry->ucECClkHigh << 16) ecclk 1611 drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c vce_state->ecclk = ((uint32_t)vce_clock_info->ucECClkHigh << 16) | le16_to_cpu(vce_clock_info->usECClkLow); ecclk 132 drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.h uint32_t ecclk; ecclk 4224 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); ecclk 74 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h uint32_t ecclk; ecclk 79 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock <= ptable->entries[i].ecclk) ecclk 87 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c if (clock >= ptable->entries[i].ecclk) ecclk 536 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c (i < vce_table->count) ? vce_table->entries[i].ecclk : 0; ecclk 622 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[level].ecclk; ecclk 624 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c clock = table->entries[table->count - 1].ecclk; ecclk 1256 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c ptable->entries[ptable->count - 1].ecclk; ecclk 1690 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c uint32_t sclk, vclk, dclk, ecclk, tmp, activity_percent; ecclk 1748 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c ecclk = vce_table->entries[vce_index].ecclk; ecclk 1749 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c *((uint32_t *)value) = ecclk; ecclk 148 drivers/gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.h uint32_t ecclk; ecclk 4672 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c *equal &= ((psa->vce_clks.evclk == psb->vce_clks.evclk) && (psa->vce_clks.ecclk == psb->vce_clks.ecclk)); ecclk 102 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h uint32_t ecclk; ecclk 119 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h uint32_t ecclk; ecclk 103 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t ecclk; ecclk 157 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h uint32_t ecclk; ecclk 181 drivers/gpu/drm/amd/powerplay/inc/power_state.h unsigned long ecclk; ecclk 807 drivers/gpu/drm/radeon/ci_dpm.c rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; ecclk 810 drivers/gpu/drm/radeon/ci_dpm.c rps->ecclk = 0; ecclk 9468 drivers/gpu/drm/radeon/cik.c int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) ecclk 9475 drivers/gpu/drm/radeon/cik.c ecclk, false, ÷rs); ecclk 2157 drivers/gpu/drm/radeon/kv_dpm.c new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; ecclk 2160 drivers/gpu/drm/radeon/kv_dpm.c new_rps->ecclk = 0; ecclk 2224 drivers/gpu/drm/radeon/kv_dpm.c new_rps->evclk || new_rps->ecclk; ecclk 2722 drivers/gpu/drm/radeon/ni.c int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) ecclk 2728 drivers/gpu/drm/radeon/ni.c ecclk, false, ÷rs); ecclk 1109 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk = ecclk 1124 drivers/gpu/drm/radeon/r600_dpm.c rdev->pm.dpm.vce_states[i].ecclk = ecclk 1342 drivers/gpu/drm/radeon/radeon.h u32 ecclk; ecclk 1435 drivers/gpu/drm/radeon/radeon.h u32 ecclk; ecclk 1526 drivers/gpu/drm/radeon/radeon.h u32 ecclk; ecclk 1961 drivers/gpu/drm/radeon/radeon.h int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk); ecclk 698 drivers/gpu/drm/radeon/radeon_asic.h int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); ecclk 750 drivers/gpu/drm/radeon/radeon_asic.h int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); ecclk 788 drivers/gpu/drm/radeon/radeon_asic.h int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk); ecclk 7484 drivers/gpu/drm/radeon/si.c int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk) ecclk 7498 drivers/gpu/drm/radeon/si.c if (!evclk || !ecclk) { ecclk 7505 drivers/gpu/drm/radeon/si.c r = radeon_uvd_calc_upll_dividers(rdev, evclk, ecclk, 125000, 250000, ecclk 2937 drivers/gpu/drm/radeon/si_dpm.c u32 evclk, u32 ecclk, u16 *voltage) ecclk 2944 drivers/gpu/drm/radeon/si_dpm.c if (((evclk == 0) && (ecclk == 0)) || ecclk 2952 drivers/gpu/drm/radeon/si_dpm.c (ecclk <= table->entries[i].ecclk)) { ecclk 3009 drivers/gpu/drm/radeon/si_dpm.c rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; ecclk 3010 drivers/gpu/drm/radeon/si_dpm.c si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, ecclk 3014 drivers/gpu/drm/radeon/si_dpm.c rps->ecclk = 0; ecclk 5936 drivers/gpu/drm/radeon/si_dpm.c (old_rps->ecclk != new_rps->ecclk)) { ecclk 5938 drivers/gpu/drm/radeon/si_dpm.c if (new_rps->evclk || new_rps->ecclk) ecclk 5942 drivers/gpu/drm/radeon/si_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); ecclk 996 drivers/gpu/drm/radeon/trinity_dpm.c (old_rps->ecclk != new_rps->ecclk)) { ecclk 998 drivers/gpu/drm/radeon/trinity_dpm.c if (new_rps->evclk || new_rps->ecclk) ecclk 1002 drivers/gpu/drm/radeon/trinity_dpm.c radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); ecclk 1506 drivers/gpu/drm/radeon/trinity_dpm.c u32 evclk, u32 ecclk, u16 *voltage) ecclk 1513 drivers/gpu/drm/radeon/trinity_dpm.c if (((evclk == 0) && (ecclk == 0)) || ecclk 1521 drivers/gpu/drm/radeon/trinity_dpm.c (ecclk <= table->entries[i].ecclk)) { ecclk 1557 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; ecclk 1560 drivers/gpu/drm/radeon/trinity_dpm.c new_rps->ecclk = 0; ecclk 1577 drivers/gpu/drm/radeon/trinity_dpm.c trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);