ecc_offset 1198 drivers/mtd/nand/raw/marvell_nand.c int ecc_offset = (lt->full_chunk_cnt * lt->spare_bytes) + ecc_offset 1230 drivers/mtd/nand/raw/marvell_nand.c nand_read_data_op(chip, oob + ecc_offset + ecc_offset 1457 drivers/mtd/nand/raw/marvell_nand.c int ecc_offset = (lt->full_chunk_cnt * lt->spare_bytes) + ecc_offset 1490 drivers/mtd/nand/raw/marvell_nand.c nand_write_data_op(chip, chip->oob_poi + ecc_offset, ecc_offset 1494 drivers/mtd/nand/raw/marvell_nand.c ecc_offset += ALIGN(ecc_len, 32); ecc_offset 176 drivers/mtd/nand/raw/nand_base.c int ecc_offset = 0; ecc_offset 183 drivers/mtd/nand/raw/nand_base.c ecc_offset = 40; ecc_offset 186 drivers/mtd/nand/raw/nand_base.c ecc_offset = 80; ecc_offset 194 drivers/mtd/nand/raw/nand_base.c oobregion->length = ecc_offset - 2; ecc_offset 196 drivers/mtd/nand/raw/nand_base.c oobregion->offset = ecc_offset + ecc->total; ecc_offset 799 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 ecc_offset = mtd->writesize + FMC2_BBM_LEN; ecc_offset 870 drivers/mtd/nand/raw/stm32_fmc2_nand.c csqar2 |= FMC2_CSQCAR2_SAO(ecc_offset >> 1); ecc_offset 872 drivers/mtd/nand/raw/stm32_fmc2_nand.c csqar2 |= FMC2_CSQCAR2_SAO(ecc_offset);