ecam_val          662 drivers/pci/controller/pcie-xilinx-nwl.c 	u32 breg_val, ecam_val, first_busno = 0;
ecam_val          696 drivers/pci/controller/pcie-xilinx-nwl.c 	ecam_val = nwl_bridge_readl(pcie, E_ECAM_CAPABILITIES) & E_ECAM_PRESENT;
ecam_val          697 drivers/pci/controller/pcie-xilinx-nwl.c 	if (!ecam_val) {
ecam_val          699 drivers/pci/controller/pcie-xilinx-nwl.c 		return ecam_val;
ecam_val          716 drivers/pci/controller/pcie-xilinx-nwl.c 	ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL);
ecam_val          717 drivers/pci/controller/pcie-xilinx-nwl.c 	pcie->last_busno = (ecam_val & E_ECAM_SIZE_LOC) >> E_ECAM_SIZE_SHIFT;
ecam_val          719 drivers/pci/controller/pcie-xilinx-nwl.c 	ecam_val = first_busno;
ecam_val          720 drivers/pci/controller/pcie-xilinx-nwl.c 	ecam_val |= (first_busno + 1) << 8;
ecam_val          721 drivers/pci/controller/pcie-xilinx-nwl.c 	ecam_val |= (pcie->last_busno << E_ECAM_SIZE_SHIFT);
ecam_val          722 drivers/pci/controller/pcie-xilinx-nwl.c 	writel(ecam_val, (pcie->ecam_base + PCI_PRIMARY_BUS));