ea1_edc_cnt2      570 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	uint32_t ea1_edc_cnt, ea1_edc_cnt2;
ea1_edc_cnt2      577 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 	ea1_edc_cnt2 = RREG32_SOC15(MMHUB, 0, mmMMEA1_EDC_CNT2_VG20);
ea1_edc_cnt2      603 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		err_data->ce_count += (ea1_edc_cnt2 & EA_EDC_CNT_MASK);
ea1_edc_cnt2      605 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		ea1_edc_cnt2 >>= EA_EDC_CNT_SHIFT;
ea1_edc_cnt2      607 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		err_data->ue_count += (ea1_edc_cnt2 & EA_EDC_CNT_MASK);
ea1_edc_cnt2      609 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		ea1_edc_cnt2 >>= EA_EDC_CNT_SHIFT;
ea1_edc_cnt2      614 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		err_data->ue_count += (ea1_edc_cnt2 & EA_EDC_CNT_MASK);
ea1_edc_cnt2      616 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 		ea1_edc_cnt2 >>= EA_EDC_CNT_SHIFT;