e3                 48 arch/h8300/lib/libgcc.h #define A3E	e3
e3                235 arch/mips/bcm47xx/board.c 	const struct bcm47xx_board_type_list3 *e3;
e3                302 arch/mips/bcm47xx/board.c 		for (e3 = bcm47xx_board_list_board; e3->value1; e3++) {
e3                303 arch/mips/bcm47xx/board.c 			if (!strcmp(buf1, e3->value1) &&
e3                304 arch/mips/bcm47xx/board.c 			    !strcmp(buf2, e3->value2) &&
e3                305 arch/mips/bcm47xx/board.c 			    !strcmp(buf3, e3->value3))
e3                306 arch/mips/bcm47xx/board.c 				return &e3->board;
e3                 58 arch/mips/include/asm/txx9/tx3927.h #define endian_def_sb2(e1, e2, e3)	\
e3                 59 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned short e1;volatile unsigned char e2, e3
e3                 60 arch/mips/include/asm/txx9/tx3927.h #define endian_def_b2s(e1, e2, e3)	\
e3                 61 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned char e1, e2;volatile unsigned short e3
e3                 62 arch/mips/include/asm/txx9/tx3927.h #define endian_def_b4(e1, e2, e3, e4)	\
e3                 63 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned char e1, e2, e3, e4
e3                 67 arch/mips/include/asm/txx9/tx3927.h #define endian_def_sb2(e1, e2, e3)	\
e3                 68 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned char e3, e2;volatile unsigned short e1
e3                 69 arch/mips/include/asm/txx9/tx3927.h #define endian_def_b2s(e1, e2, e3)	\
e3                 70 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned short e3;volatile unsigned char e2, e1
e3                 71 arch/mips/include/asm/txx9/tx3927.h #define endian_def_b4(e1, e2, e3, e4)	\
e3                 72 arch/mips/include/asm/txx9/tx3927.h 	volatile unsigned char e4, e3, e2, e1
e3                 33 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c #define INTERLEAVED_RGB_FMT(fmt, a, r, g, b, e0, e1, e2, e3, uc, alpha,   \
e3                 39 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.element = { (e0), (e1), (e2), (e3) },                            \
e3                 52 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c #define INTERLEAVED_RGB_FMT_TILED(fmt, a, r, g, b, e0, e1, e2, e3, uc,    \
e3                 58 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.element = { (e0), (e1), (e2), (e3) },                            \
e3                 72 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c #define INTERLEAVED_YUV_FMT(fmt, a, r, g, b, e0, e1, e2, e3,              \
e3                 78 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	.element = { (e0), (e1), (e2), (e3)},                             \
e3                 63 drivers/gpu/drm/msm/disp/mdp_format.c #define FMT(name, a, r, g, b, e0, e1, e2, e3, alpha, tight, c, cnt, fp, cs, yuv) { \
e3                 69 drivers/gpu/drm/msm/disp/mdp_format.c 		.unpack = { e0, e1, e2, e3 },                    \
e3                227 drivers/infiniband/hw/hfi1/chip.c 	e3, e3val, \
e3                244 drivers/infiniband/hw/hfi1/chip.c 	((u64)(e3val) << DCC_CFG_SC_VL_TABLE_##range##_ENTRY##e3##_SHIFT) | \
e3                569 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h 		u32 e3;		/* 578xx */
e3                702 drivers/net/ethernet/broadcom/bnx2x/bnx2x_init.h 		return bnx2x_blocks_parity_data[idx].reg_mask.e3;
e3                616 lib/bch.c      	unsigned int a, b, c, a2, b2, c2, e3, tmp[4];
e3                620 lib/bch.c      		e3 = poly->c[3];
e3                621 lib/bch.c      		c2 = gf_div(bch, poly->c[0], e3);
e3                622 lib/bch.c      		b2 = gf_div(bch, poly->c[1], e3);
e3                623 lib/bch.c      		a2 = gf_div(bch, poly->c[2], e3);