dw 83 arch/arm/mach-imx/mach-imx6q.c u32 dw; dw 91 arch/arm/mach-imx/mach-imx6q.c pci_read_config_dword(dev, 0x62c, &dw); dw 92 arch/arm/mach-imx/mach-imx6q.c dw |= 0xaaa8; // GPIO1-7 outputs dw 93 arch/arm/mach-imx/mach-imx6q.c pci_write_config_dword(dev, 0x62c, dw); dw 95 arch/arm/mach-imx/mach-imx6q.c pci_read_config_dword(dev, 0x644, &dw); dw 96 arch/arm/mach-imx/mach-imx6q.c dw |= 0xfe; // GPIO1-7 output high dw 97 arch/arm/mach-imx/mach-imx6q.c pci_write_config_dword(dev, 0x644, dw); dw 801 arch/x86/crypto/camellia_glue.c u32 dw, tl, tr; dw 813 arch/x86/crypto/camellia_glue.c dw = (subRL[1] & subRL[9]) >> 32; dw 814 arch/x86/crypto/camellia_glue.c subRL[1] ^= rol32(dw, 1); dw 825 arch/x86/crypto/camellia_glue.c dw = (subRL[1] & subRL[17]) >> 32; dw 826 arch/x86/crypto/camellia_glue.c subRL[1] ^= rol32(dw, 1); dw 844 arch/x86/crypto/camellia_glue.c dw = (subRL[1] & subRL[25]) >> 32; dw 845 arch/x86/crypto/camellia_glue.c subRL[1] ^= rol32(dw, 1); dw 867 arch/x86/crypto/camellia_glue.c dw = (kw4 & subRL[24]) >> 32; dw 868 arch/x86/crypto/camellia_glue.c kw4 ^= rol32(dw, 1); dw 880 arch/x86/crypto/camellia_glue.c dw = (kw4 & subRL[16]) >> 32; dw 881 arch/x86/crypto/camellia_glue.c kw4 ^= rol32(dw, 1); dw 892 arch/x86/crypto/camellia_glue.c dw = (kw4 & subRL[8]) >> 32; dw 893 arch/x86/crypto/camellia_glue.c kw4 ^= rol32(dw, 1); dw 913 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[8] >> 32); /* FL(kl1) */ dw 914 arch/x86/crypto/camellia_glue.c tr = subRL[10] ^ rol32(dw, 1); dw 922 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[9] >> 32); /* FLinv(kl2) */ dw 923 arch/x86/crypto/camellia_glue.c tr = subRL[7] ^ rol32(dw, 1); dw 933 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[16] >> 32); /* FL(kl3) */ dw 934 arch/x86/crypto/camellia_glue.c tr = subRL[18] ^ rol32(dw, 1); dw 942 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[17] >> 32); /* FLinv(kl4) */ dw 943 arch/x86/crypto/camellia_glue.c tr = subRL[15] ^ rol32(dw, 1); dw 957 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[24] >> 32); /* FL(kl5) */ dw 958 arch/x86/crypto/camellia_glue.c tr = subRL[26] ^ rol32(dw, 1); dw 966 arch/x86/crypto/camellia_glue.c dw = tl & (subRL[25] >> 32); /* FLinv(kl6) */ dw 967 arch/x86/crypto/camellia_glue.c tr = subRL[23] ^ rol32(dw, 1); dw 210 arch/x86/platform/uv/tlb_uv.c unsigned long dw; dw 215 arch/x86/platform/uv/tlb_uv.c dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec; dw 216 arch/x86/platform/uv/tlb_uv.c ops.write_l_sw_ack(dw); dw 367 crypto/camellia_generic.c u32 dw, tl, tr; dw 378 crypto/camellia_generic.c dw = subL[1] & subL[9]; dw 379 crypto/camellia_generic.c subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl2) */ dw 387 crypto/camellia_generic.c dw = subL[1] & subL[17]; dw 388 crypto/camellia_generic.c subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl4) */ dw 403 crypto/camellia_generic.c dw = subL[1] & subL[25]; dw 404 crypto/camellia_generic.c subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl6) */ dw 423 crypto/camellia_generic.c dw = kw4l & subL[24]; dw 424 crypto/camellia_generic.c kw4r ^= rol32(dw, 1); /* modified for FL(kl5) */ dw 433 crypto/camellia_generic.c dw = kw4l & subL[16]; dw 434 crypto/camellia_generic.c kw4r ^= rol32(dw, 1); /* modified for FL(kl3) */ dw 442 crypto/camellia_generic.c dw = kw4l & subL[8]; dw 443 crypto/camellia_generic.c kw4r ^= rol32(dw, 1); /* modified for FL(kl1) */ dw 467 crypto/camellia_generic.c dw = tl & subL[8]; /* FL(kl1) */ dw 468 crypto/camellia_generic.c tr = subR[10] ^ rol32(dw, 1); dw 476 crypto/camellia_generic.c dw = tl & subL[9]; /* FLinv(kl2) */ dw 477 crypto/camellia_generic.c tr = subR[7] ^ rol32(dw, 1); dw 489 crypto/camellia_generic.c dw = tl & subL[16]; /* FL(kl3) */ dw 490 crypto/camellia_generic.c tr = subR[18] ^ rol32(dw, 1); dw 498 crypto/camellia_generic.c dw = tl & subL[17]; /* FLinv(kl4) */ dw 499 crypto/camellia_generic.c tr = subR[15] ^ rol32(dw, 1); dw 517 crypto/camellia_generic.c dw = tl & subL[24]; /* FL(kl5) */ dw 518 crypto/camellia_generic.c tr = subR[26] ^ rol32(dw, 1); dw 526 crypto/camellia_generic.c dw = tl & subL[25]; /* FLinv(kl6) */ dw 527 crypto/camellia_generic.c tr = subR[23] ^ rol32(dw, 1); dw 1267 drivers/ata/sata_mv.c u32 dw; dw 1271 drivers/ata/sata_mv.c (void) pci_read_config_dword(pdev, b, &dw); dw 1272 drivers/ata/sata_mv.c printk("%08x ", dw); dw 305 drivers/ata/sata_sx4.c unsigned int dw = PDC_DIMM_APKT_PRD >> 2; dw 312 drivers/ata/sata_sx4.c buf32[dw] = cpu_to_le32(addr); dw 313 drivers/ata/sata_sx4.c buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); dw 319 drivers/ata/sata_sx4.c buf32[dw], buf32[dw + 1]); dw 326 drivers/ata/sata_sx4.c unsigned int dw = PDC_DIMM_HPKT_PRD >> 2; dw 333 drivers/ata/sata_sx4.c buf32[dw] = cpu_to_le32(addr); dw 334 drivers/ata/sata_sx4.c buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); dw 340 drivers/ata/sata_sx4.c buf32[dw], buf32[dw + 1]); dw 347 drivers/ata/sata_sx4.c unsigned int i, dw; dw 372 drivers/ata/sata_sx4.c dw = i >> 2; dw 374 drivers/ata/sata_sx4.c buf32[dw] = 0; dw 376 drivers/ata/sata_sx4.c buf32[dw] = cpu_to_le32(dimm_sg); dw 377 drivers/ata/sata_sx4.c buf32[dw + 1] = 0; dw 399 drivers/ata/sata_sx4.c unsigned int dw; dw 412 drivers/ata/sata_sx4.c dw = PDC_DIMM_HOST_PKT >> 2; dw 423 drivers/ata/sata_sx4.c buf32[dw + 0] = cpu_to_le32(tmp); dw 424 drivers/ata/sata_sx4.c buf32[dw + 1] = cpu_to_le32(host_sg); dw 425 drivers/ata/sata_sx4.c buf32[dw + 2] = cpu_to_le32(dimm_sg); dw 426 drivers/ata/sata_sx4.c buf32[dw + 3] = 0; dw 431 drivers/ata/sata_sx4.c buf32[dw + 0], dw 432 drivers/ata/sata_sx4.c buf32[dw + 1], dw 433 drivers/ata/sata_sx4.c buf32[dw + 2], dw 434 drivers/ata/sata_sx4.c buf32[dw + 3]); dw 5906 drivers/block/drbd/drbd_receiver.c struct drbd_device_work *dw; dw 5938 drivers/block/drbd/drbd_receiver.c dw = kmalloc(sizeof(*dw), GFP_NOIO); dw 5939 drivers/block/drbd/drbd_receiver.c if (dw) { dw 5940 drivers/block/drbd/drbd_receiver.c dw->w.cb = w_ov_finished; dw 5941 drivers/block/drbd/drbd_receiver.c dw->device = device; dw 5942 drivers/block/drbd/drbd_receiver.c drbd_queue_work(&peer_device->connection->sender_work, &dw->w); dw 821 drivers/block/drbd/drbd_worker.c struct drbd_device_work *dw = dw 823 drivers/block/drbd/drbd_worker.c struct drbd_device *device = dw->device; dw 824 drivers/block/drbd/drbd_worker.c kfree(dw); dw 833 drivers/block/drbd/drbd_worker.c struct drbd_device_work *dw = dw 835 drivers/block/drbd/drbd_worker.c struct drbd_device *device = dw->device; dw 836 drivers/block/drbd/drbd_worker.c kfree(dw); dw 859 drivers/block/drbd/drbd_worker.c struct drbd_device_work *dw; dw 873 drivers/block/drbd/drbd_worker.c dw = kmalloc(sizeof(struct drbd_device_work), GFP_ATOMIC); dw 874 drivers/block/drbd/drbd_worker.c if (dw) { dw 875 drivers/block/drbd/drbd_worker.c dw->w.cb = w_resync_finished; dw 876 drivers/block/drbd/drbd_worker.c dw->device = device; dw 877 drivers/block/drbd/drbd_worker.c drbd_queue_work(&connection->sender_work, &dw->w); dw 425 drivers/clk/rockchip/clk.h #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ dw 439 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 447 drivers/clk/rockchip/clk.h mf, do, ds, dw, df, go, gs, gf) \ dw 461 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 468 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX(_id, cname, pname, f, mo, ds, dw, df, \ dw 479 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 486 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX_DIVTBL(_id, cname, pname, f, mo, ds, dw,\ dw 497 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 524 drivers/clk/rockchip/clk.h ds, dw, df) \ dw 537 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 543 drivers/clk/rockchip/clk.h mw, mf, ds, dw, df, dt) \ dw 556 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 614 drivers/clk/rockchip/clk.h ds, dw, df) \ dw 626 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 754 drivers/clk/rockchip/clk.h #define COMPOSITE_HALFDIV(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ dw 768 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 776 drivers/clk/rockchip/clk.h ds, dw, df) \ dw 789 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 794 drivers/clk/rockchip/clk.h #define COMPOSITE_NOMUX_HALFDIV(_id, cname, pname, f, mo, ds, dw, df, \ dw 805 drivers/clk/rockchip/clk.h .div_width = dw, \ dw 1776 drivers/crypto/hifn_795x.c struct delayed_work *dw = to_delayed_work(work); dw 1777 drivers/crypto/hifn_795x.c struct hifn_device *dev = container_of(dw, struct hifn_device, work); dw 179 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c for (i = 0; i < chip->dw->hdata->nr_channels; i++) { dw 180 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); dw 181 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c axi_chan_disable(&chip->dw->chan[i]); dw 188 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c u32 max_width = chan->chip->dw->hdata->m_data_width; dw 200 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct dw_axi_dma *dw = chan->chip->dw; dw 204 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c desc = dma_pool_zalloc(dw->desc_pool, GFP_NOWAIT, &phys); dw 222 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct dw_axi_dma *dw = chan->chip->dw; dw 228 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dma_pool_free(dw->desc_pool, child, child->vd.tx.phys); dw 232 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dma_pool_free(dw->desc_pool, desc, desc->vd.tx.phys); dw 275 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c u32 priority = chan->chip->dw->hdata->priority[chan->id]; dw 416 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (desc->chan->chip->dw->hdata->nr_masters > 1) dw 437 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c max_block_ts = chan->chip->dw->hdata->block_size[chan->id]; dw 469 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (chan->chip->dw->hdata->restrict_axi_burst_len) { dw 470 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; dw 598 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct dw_axi_dma *dw = chip->dw; dw 607 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c for (i = 0; i < dw->hdata->nr_channels; i++) { dw 608 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chan = &dw->chan[i]; dw 765 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->nr_channels = tmp; dw 773 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->nr_masters = tmp; dw 781 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->m_data_width = tmp; dw 784 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->nr_channels); dw 787 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { dw 791 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->block_size[tmp] = carr[tmp]; dw 795 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->nr_channels); dw 799 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { dw 800 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (carr[tmp] >= chip->dw->hdata->nr_channels) dw 803 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->priority[tmp] = carr[tmp]; dw 814 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->restrict_axi_burst_len = true; dw 815 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata->axi_rw_burst_len = tmp - 1; dw 825 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct dw_axi_dma *dw; dw 834 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL); dw 835 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (!dw) dw 842 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw = dw; dw 844 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c chip->dw->hdata = hdata; dw 867 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels, dw 868 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c sizeof(*dw->chan), GFP_KERNEL); dw 869 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (!dw->chan) dw 878 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->desc_pool = dmam_pool_create(KBUILD_MODNAME, chip->dev, dw 880 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c if (!dw->desc_pool) { dw 885 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c INIT_LIST_HEAD(&dw->dma.channels); dw 887 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct axi_dma_chan *chan = &dw->chan[i]; dw 895 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c vchan_init(&chan->vc, &dw->dma); dw 899 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); dw 902 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.chancnt = hdata->nr_channels; dw 903 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.src_addr_widths = AXI_DMA_BUSWIDTHS; dw 904 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS; dw 905 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.directions = BIT(DMA_MEM_TO_MEM); dw 906 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; dw 908 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.dev = chip->dev; dw 909 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_tx_status = dma_chan_tx_status; dw 910 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_issue_pending = dma_chan_issue_pending; dw 911 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_terminate_all = dma_chan_terminate_all; dw 912 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_pause = dma_chan_pause; dw 913 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_resume = dma_chan_resume; dw 915 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_alloc_chan_resources = dma_chan_alloc_chan_resources; dw 916 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_free_chan_resources = dma_chan_free_chan_resources; dw 918 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy; dw 938 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c ret = dmaenginem_async_device_register(&dw->dma); dw 943 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c dw->hdata->nr_channels); dw 956 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c struct dw_axi_dma *dw = chip->dw; dw 964 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c for (i = 0; i < dw->hdata->nr_channels; i++) { dw 965 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c axi_chan_disable(&chip->dw->chan[i]); dw 966 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); dw 975 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c list_for_each_entry_safe(chan, _chan, &dw->dma.channels, dw 63 drivers/dma/dw-axi-dmac/dw-axi-dmac.h struct dw_axi_dma *dw; dw 67 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = chan->chip->dw; dw 83 drivers/dma/dw-edma/dw-edma-core.c chunk->ll_region.paddr = dw->ll_region.paddr + chan->ll_off; dw 84 drivers/dma/dw-edma/dw-edma-core.c chunk->ll_region.vaddr = dw->ll_region.vaddr + chan->ll_off; dw 535 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = dw_irq->dw; dw 541 drivers/dma/dw-edma/dw-edma-core.c total = dw->wr_ch_cnt; dw 545 drivers/dma/dw-edma/dw-edma-core.c total = dw->rd_ch_cnt; dw 546 drivers/dma/dw-edma/dw-edma-core.c off = dw->wr_ch_cnt; dw 550 drivers/dma/dw-edma/dw-edma-core.c val = dw_edma_v0_core_status_done_int(dw, write ? dw 555 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma_chan *chan = &dw->chan[pos + off]; dw 560 drivers/dma/dw-edma/dw-edma-core.c val = dw_edma_v0_core_status_abort_int(dw, write ? dw 565 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma_chan *chan = &dw->chan[pos + off]; dw 628 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = chip->dw; dw 638 drivers/dma/dw-edma/dw-edma-core.c ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt; dw 639 drivers/dma/dw-edma/dw-edma-core.c ll_chunk = dw->ll_region.sz; dw 640 drivers/dma/dw-edma/dw-edma-core.c dt_chunk = dw->dt_region.sz; dw 650 drivers/dma/dw-edma/dw-edma-core.c cnt = dw->wr_ch_cnt; dw 651 drivers/dma/dw-edma/dw-edma-core.c dma = &dw->wr_edma; dw 655 drivers/dma/dw-edma/dw-edma-core.c i = dw->wr_ch_cnt; dw 656 drivers/dma/dw-edma/dw-edma-core.c cnt = dw->rd_ch_cnt; dw 657 drivers/dma/dw-edma/dw-edma-core.c dma = &dw->rd_edma; dw 663 drivers/dma/dw-edma/dw-edma-core.c for (j = 0; (alloc || dw->nr_irqs == 1) && j < cnt; j++, i++) { dw 664 drivers/dma/dw-edma/dw-edma-core.c chan = &dw->chan[i]; dw 688 drivers/dma/dw-edma/dw-edma-core.c if (dw->nr_irqs == 1) dw 693 drivers/dma/dw-edma/dw-edma-core.c irq = &dw->irq[pos]; dw 700 drivers/dma/dw-edma/dw-edma-core.c irq->dw = dw; dw 711 drivers/dma/dw-edma/dw-edma-core.c dt_region->paddr = dw->dt_region.paddr + chan->dt_off; dw 712 drivers/dma/dw-edma/dw-edma-core.c dt_region->vaddr = dw->dt_region.vaddr + chan->dt_off; dw 771 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = chip->dw; dw 777 drivers/dma/dw-edma/dw-edma-core.c ch_cnt = dw->wr_ch_cnt + dw->rd_ch_cnt; dw 779 drivers/dma/dw-edma/dw-edma-core.c if (dw->nr_irqs < 1) dw 782 drivers/dma/dw-edma/dw-edma-core.c if (dw->nr_irqs == 1) { dw 786 drivers/dma/dw-edma/dw-edma-core.c IRQF_SHARED, dw->name, &dw->irq[0]); dw 788 drivers/dma/dw-edma/dw-edma-core.c dw->nr_irqs = 0; dw 793 drivers/dma/dw-edma/dw-edma-core.c &dw->irq[0].msi); dw 796 drivers/dma/dw-edma/dw-edma-core.c int tmp = dw->nr_irqs; dw 799 drivers/dma/dw-edma/dw-edma-core.c dw_edma_dec_irq_alloc(&tmp, wr_alloc, dw->wr_ch_cnt); dw 800 drivers/dma/dw-edma/dw-edma-core.c dw_edma_dec_irq_alloc(&tmp, rd_alloc, dw->rd_ch_cnt); dw 803 drivers/dma/dw-edma/dw-edma-core.c dw_edma_add_irq_mask(&wr_mask, *wr_alloc, dw->wr_ch_cnt); dw 804 drivers/dma/dw-edma/dw-edma-core.c dw_edma_add_irq_mask(&rd_mask, *rd_alloc, dw->rd_ch_cnt); dw 811 drivers/dma/dw-edma/dw-edma-core.c IRQF_SHARED, dw->name, dw 812 drivers/dma/dw-edma/dw-edma-core.c &dw->irq[i]); dw 814 drivers/dma/dw-edma/dw-edma-core.c dw->nr_irqs = i; dw 819 drivers/dma/dw-edma/dw-edma-core.c &dw->irq[i].msi); dw 822 drivers/dma/dw-edma/dw-edma-core.c dw->nr_irqs = i; dw 831 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = chip->dw; dw 836 drivers/dma/dw-edma/dw-edma-core.c raw_spin_lock_init(&dw->lock); dw 839 drivers/dma/dw-edma/dw-edma-core.c dw->wr_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_WRITE); dw 840 drivers/dma/dw-edma/dw-edma-core.c if (!dw->wr_ch_cnt) dw 844 drivers/dma/dw-edma/dw-edma-core.c dw->rd_ch_cnt = dw_edma_v0_core_ch_count(dw, EDMA_DIR_READ); dw 845 drivers/dma/dw-edma/dw-edma-core.c if (!dw->rd_ch_cnt) dw 849 drivers/dma/dw-edma/dw-edma-core.c dw->wr_ch_cnt, dw->rd_ch_cnt); dw 852 drivers/dma/dw-edma/dw-edma-core.c dw->chan = devm_kcalloc(dev, dw->wr_ch_cnt + dw->rd_ch_cnt, dw 853 drivers/dma/dw-edma/dw-edma-core.c sizeof(*dw->chan), GFP_KERNEL); dw 854 drivers/dma/dw-edma/dw-edma-core.c if (!dw->chan) dw 857 drivers/dma/dw-edma/dw-edma-core.c snprintf(dw->name, sizeof(dw->name), "dw-edma-core:%d", chip->id); dw 860 drivers/dma/dw-edma/dw-edma-core.c dw_edma_v0_core_off(dw); dw 886 drivers/dma/dw-edma/dw-edma-core.c for (i = (dw->nr_irqs - 1); i >= 0; i--) dw 887 drivers/dma/dw-edma/dw-edma-core.c free_irq(pci_irq_vector(to_pci_dev(dev), i), &dw->irq[i]); dw 889 drivers/dma/dw-edma/dw-edma-core.c dw->nr_irqs = 0; dw 899 drivers/dma/dw-edma/dw-edma-core.c struct dw_edma *dw = chip->dw; dw 903 drivers/dma/dw-edma/dw-edma-core.c dw_edma_v0_core_off(dw); dw 906 drivers/dma/dw-edma/dw-edma-core.c for (i = (dw->nr_irqs - 1); i >= 0; i--) dw 907 drivers/dma/dw-edma/dw-edma-core.c free_irq(pci_irq_vector(to_pci_dev(dev), i), &dw->irq[i]); dw 912 drivers/dma/dw-edma/dw-edma-core.c list_for_each_entry_safe(chan, _chan, &dw->wr_edma.channels, dw 918 drivers/dma/dw-edma/dw-edma-core.c list_for_each_entry_safe(chan, _chan, &dw->rd_edma.channels, dw 925 drivers/dma/dw-edma/dw-edma-core.c dma_async_device_unregister(&dw->wr_edma); dw 926 drivers/dma/dw-edma/dw-edma-core.c dma_async_device_unregister(&dw->rd_edma); dw 103 drivers/dma/dw-edma/dw-edma-core.h struct dw_edma *dw; dw 64 drivers/dma/dw-edma/dw-edma-pcie.c struct dw_edma *dw; dw 114 drivers/dma/dw-edma/dw-edma-pcie.c dw = devm_kzalloc(dev, sizeof(*dw), GFP_KERNEL); dw 115 drivers/dma/dw-edma/dw-edma-pcie.c if (!dw) dw 128 drivers/dma/dw-edma/dw-edma-pcie.c chip->dw = dw; dw 133 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar]; dw 134 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.vaddr += pdata->rg_off; dw 135 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start; dw 136 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.paddr += pdata->rg_off; dw 137 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.sz = pdata->rg_sz; dw 139 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.vaddr = pcim_iomap_table(pdev)[pdata->ll_bar]; dw 140 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.vaddr += pdata->ll_off; dw 141 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.paddr = pdev->resource[pdata->ll_bar].start; dw 142 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.paddr += pdata->ll_off; dw 143 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.sz = pdata->ll_sz; dw 145 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.vaddr = pcim_iomap_table(pdev)[pdata->dt_bar]; dw 146 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.vaddr += pdata->dt_off; dw 147 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.paddr = pdev->resource[pdata->dt_bar].start; dw 148 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.paddr += pdata->dt_off; dw 149 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.sz = pdata->dt_sz; dw 151 drivers/dma/dw-edma/dw-edma-pcie.c dw->version = pdata->version; dw 152 drivers/dma/dw-edma/dw-edma-pcie.c dw->mode = pdata->mode; dw 153 drivers/dma/dw-edma/dw-edma-pcie.c dw->nr_irqs = nr_irqs; dw 156 drivers/dma/dw-edma/dw-edma-pcie.c pci_dbg(pdev, "Version:\t%u\n", dw->version); dw 159 drivers/dma/dw-edma/dw-edma-pcie.c dw->mode == EDMA_MODE_LEGACY ? "Legacy" : "Unroll"); dw 163 drivers/dma/dw-edma/dw-edma-pcie.c dw->rg_region.vaddr, &dw->rg_region.paddr); dw 167 drivers/dma/dw-edma/dw-edma-pcie.c dw->ll_region.vaddr, &dw->ll_region.paddr); dw 171 drivers/dma/dw-edma/dw-edma-pcie.c dw->dt_region.vaddr, &dw->dt_region.paddr); dw 173 drivers/dma/dw-edma/dw-edma-pcie.c pci_dbg(pdev, "Nr. IRQs:\t%u\n", dw->nr_irqs); dw 181 drivers/dma/dw-edma/dw-edma-pcie.c dw->irq = devm_kcalloc(dev, nr_irqs, sizeof(*dw->irq), GFP_KERNEL); dw 182 drivers/dma/dw-edma/dw-edma-pcie.c if (!dw->irq) dw 26 drivers/dma/dw-edma/dw-edma-v0-core.c static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) dw 28 drivers/dma/dw-edma/dw-edma-v0-core.c return dw->rg_region.vaddr; dw 31 drivers/dma/dw-edma/dw-edma-v0-core.c #define SET(dw, name, value) \ dw 32 drivers/dma/dw-edma/dw-edma-v0-core.c writel(value, &(__dw_regs(dw)->name)) dw 34 drivers/dma/dw-edma/dw-edma-v0-core.c #define GET(dw, name) \ dw 35 drivers/dma/dw-edma/dw-edma-v0-core.c readl(&(__dw_regs(dw)->name)) dw 37 drivers/dma/dw-edma/dw-edma-v0-core.c #define SET_RW(dw, dir, name, value) \ dw 40 drivers/dma/dw-edma/dw-edma-v0-core.c SET(dw, wr_##name, value); \ dw 42 drivers/dma/dw-edma/dw-edma-v0-core.c SET(dw, rd_##name, value); \ dw 45 drivers/dma/dw-edma/dw-edma-v0-core.c #define GET_RW(dw, dir, name) \ dw 47 drivers/dma/dw-edma/dw-edma-v0-core.c ? GET(dw, wr_##name) \ dw 48 drivers/dma/dw-edma/dw-edma-v0-core.c : GET(dw, rd_##name)) dw 50 drivers/dma/dw-edma/dw-edma-v0-core.c #define SET_BOTH(dw, name, value) \ dw 52 drivers/dma/dw-edma/dw-edma-v0-core.c SET(dw, wr_##name, value); \ dw 53 drivers/dma/dw-edma/dw-edma-v0-core.c SET(dw, rd_##name, value); \ dw 57 drivers/dma/dw-edma/dw-edma-v0-core.c __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) dw 59 drivers/dma/dw-edma/dw-edma-v0-core.c if (dw->mode == EDMA_MODE_LEGACY) dw 60 drivers/dma/dw-edma/dw-edma-v0-core.c return &(__dw_regs(dw)->type.legacy.ch); dw 63 drivers/dma/dw-edma/dw-edma-v0-core.c return &__dw_regs(dw)->type.unroll.ch[ch].wr; dw 65 drivers/dma/dw-edma/dw-edma-v0-core.c return &__dw_regs(dw)->type.unroll.ch[ch].rd; dw 68 drivers/dma/dw-edma/dw-edma-v0-core.c static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, dw 71 drivers/dma/dw-edma/dw-edma-v0-core.c if (dw->mode == EDMA_MODE_LEGACY) { dw 75 drivers/dma/dw-edma/dw-edma-v0-core.c raw_spin_lock_irqsave(&dw->lock, flags); dw 82 drivers/dma/dw-edma/dw-edma-v0-core.c &(__dw_regs(dw)->type.legacy.viewport_sel)); dw 85 drivers/dma/dw-edma/dw-edma-v0-core.c raw_spin_unlock_irqrestore(&dw->lock, flags); dw 91 drivers/dma/dw-edma/dw-edma-v0-core.c static inline u32 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, dw 96 drivers/dma/dw-edma/dw-edma-v0-core.c if (dw->mode == EDMA_MODE_LEGACY) { dw 100 drivers/dma/dw-edma/dw-edma-v0-core.c raw_spin_lock_irqsave(&dw->lock, flags); dw 107 drivers/dma/dw-edma/dw-edma-v0-core.c &(__dw_regs(dw)->type.legacy.viewport_sel)); dw 110 drivers/dma/dw-edma/dw-edma-v0-core.c raw_spin_unlock_irqrestore(&dw->lock, flags); dw 118 drivers/dma/dw-edma/dw-edma-v0-core.c #define SET_CH(dw, dir, ch, name, value) \ dw 119 drivers/dma/dw-edma/dw-edma-v0-core.c writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name)) dw 121 drivers/dma/dw-edma/dw-edma-v0-core.c #define GET_CH(dw, dir, ch, name) \ dw 122 drivers/dma/dw-edma/dw-edma-v0-core.c readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name)) dw 128 drivers/dma/dw-edma/dw-edma-v0-core.c void dw_edma_v0_core_off(struct dw_edma *dw) dw 130 drivers/dma/dw-edma/dw-edma-v0-core.c SET_BOTH(dw, int_mask, EDMA_V0_DONE_INT_MASK | EDMA_V0_ABORT_INT_MASK); dw 131 drivers/dma/dw-edma/dw-edma-v0-core.c SET_BOTH(dw, int_clear, EDMA_V0_DONE_INT_MASK | EDMA_V0_ABORT_INT_MASK); dw 132 drivers/dma/dw-edma/dw-edma-v0-core.c SET_BOTH(dw, engine_en, 0); dw 135 drivers/dma/dw-edma/dw-edma-v0-core.c u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) dw 140 drivers/dma/dw-edma/dw-edma-v0-core.c num_ch = FIELD_GET(EDMA_V0_WRITE_CH_COUNT_MASK, GET(dw, ctrl)); dw 142 drivers/dma/dw-edma/dw-edma-v0-core.c num_ch = FIELD_GET(EDMA_V0_READ_CH_COUNT_MASK, GET(dw, ctrl)); dw 152 drivers/dma/dw-edma/dw-edma-v0-core.c struct dw_edma *dw = chan->chip->dw; dw 156 drivers/dma/dw-edma/dw-edma-v0-core.c GET_CH(dw, chan->dir, chan->id, ch_control1)); dw 168 drivers/dma/dw-edma/dw-edma-v0-core.c struct dw_edma *dw = chan->chip->dw; dw 170 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, int_clear, dw 176 drivers/dma/dw-edma/dw-edma-v0-core.c struct dw_edma *dw = chan->chip->dw; dw 178 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, int_clear, dw 182 drivers/dma/dw-edma/dw-edma-v0-core.c u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir) dw 184 drivers/dma/dw-edma/dw-edma-v0-core.c return FIELD_GET(EDMA_V0_DONE_INT_MASK, GET_RW(dw, dir, int_status)); dw 187 drivers/dma/dw-edma/dw-edma-v0-core.c u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) dw 189 drivers/dma/dw-edma/dw-edma-v0-core.c return FIELD_GET(EDMA_V0_ABORT_INT_MASK, GET_RW(dw, dir, int_status)); dw 239 drivers/dma/dw-edma/dw-edma-v0-core.c struct dw_edma *dw = chan->chip->dw; dw 246 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, engine_en, BIT(0)); dw 248 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, int_mask); dw 251 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, int_mask, tmp); dw 253 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, linked_list_err_en); dw 255 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, linked_list_err_en, tmp); dw 257 drivers/dma/dw-edma/dw-edma-v0-core.c SET_CH(dw, chan->dir, chan->id, ch_control1, dw 260 drivers/dma/dw-edma/dw-edma-v0-core.c SET_CH(dw, chan->dir, chan->id, llp_low, dw 262 drivers/dma/dw-edma/dw-edma-v0-core.c SET_CH(dw, chan->dir, chan->id, llp_high, dw 266 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, doorbell, dw 272 drivers/dma/dw-edma/dw-edma-v0-core.c struct dw_edma *dw = chan->chip->dw; dw 276 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, done_imwr_low, chan->msi.address_lo); dw 277 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, done_imwr_high, chan->msi.address_hi); dw 279 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, abort_imwr_low, chan->msi.address_lo); dw 280 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, abort_imwr_high, chan->msi.address_hi); dw 285 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, ch01_imwr_data); dw 290 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, ch23_imwr_data); dw 295 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, ch45_imwr_data); dw 300 drivers/dma/dw-edma/dw-edma-v0-core.c tmp = GET_RW(dw, chan->dir, ch67_imwr_data); dw 319 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, ch01_imwr_data, tmp); dw 324 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, ch23_imwr_data, tmp); dw 329 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, ch45_imwr_data, tmp); dw 334 drivers/dma/dw-edma/dw-edma-v0-core.c SET_RW(dw, chan->dir, ch67_imwr_data, tmp); dw 42 drivers/dma/dw-edma/dw-edma-v0-debugfs.c static struct dw_edma *dw; dw 58 drivers/dma/dw-edma/dw-edma-v0-debugfs.c if (dw->mode == EDMA_MODE_LEGACY && dw 65 drivers/dma/dw-edma/dw-edma-v0-debugfs.c for (ch = 0; ch < dw->wr_ch_cnt; ch++) dw 71 drivers/dma/dw-edma/dw-edma-v0-debugfs.c for (ch = 0; ch < dw->rd_ch_cnt; ch++) dw 83 drivers/dma/dw-edma/dw-edma-v0-debugfs.c raw_spin_lock_irqsave(&dw->lock, flags); dw 88 drivers/dma/dw-edma/dw-edma-v0-debugfs.c raw_spin_unlock_irqrestore(&dw->lock, flags); dw 177 drivers/dma/dw-edma/dw-edma-v0-debugfs.c if (dw->mode == EDMA_MODE_UNROLL) { dw 183 drivers/dma/dw-edma/dw-edma-v0-debugfs.c for (i = 0; i < dw->wr_ch_cnt; i++) { dw 246 drivers/dma/dw-edma/dw-edma-v0-debugfs.c if (dw->mode == EDMA_MODE_UNROLL) { dw 252 drivers/dma/dw-edma/dw-edma-v0-debugfs.c for (i = 0; i < dw->rd_ch_cnt; i++) { dw 288 drivers/dma/dw-edma/dw-edma-v0-debugfs.c dw = chip->dw; dw 289 drivers/dma/dw-edma/dw-edma-v0-debugfs.c if (!dw) dw 292 drivers/dma/dw-edma/dw-edma-v0-debugfs.c regs = dw->rg_region.vaddr; dw 296 drivers/dma/dw-edma/dw-edma-v0-debugfs.c base_dir = debugfs_create_dir(dw->name, 0); dw 300 drivers/dma/dw-edma/dw-edma-v0-debugfs.c debugfs_create_u32("version", 0444, base_dir, &dw->version); dw 301 drivers/dma/dw-edma/dw-edma-v0-debugfs.c debugfs_create_u32("mode", 0444, base_dir, &dw->mode); dw 302 drivers/dma/dw-edma/dw-edma-v0-debugfs.c debugfs_create_u16("wr_ch_cnt", 0444, base_dir, &dw->wr_ch_cnt); dw 303 drivers/dma/dw-edma/dw-edma-v0-debugfs.c debugfs_create_u16("rd_ch_cnt", 0444, base_dir, &dw->rd_ch_cnt); dw 23 drivers/dma/dw/acpi.c void dw_dma_acpi_controller_register(struct dw_dma *dw) dw 25 drivers/dma/dw/acpi.c struct device *dev = dw->dma.dev; dw 45 drivers/dma/dw/acpi.c void dw_dma_acpi_controller_free(struct dw_dma *dw) dw 47 drivers/dma/dw/acpi.c struct device *dev = dw->dma.dev; dw 82 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 86 drivers/dma/dw/core.c desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); dw 101 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 109 drivers/dma/dw/core.c dma_pool_free(dw->desc_pool, child, child->txd.phys); dw 113 drivers/dma/dw/core.c dma_pool_free(dw->desc_pool, desc, desc->txd.phys); dw 119 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 124 drivers/dma/dw/core.c dw->initialize_chan(dwc); dw 127 drivers/dma/dw/core.c channel_set_bit(dw, MASK.XFER, dwc->mask); dw 128 drivers/dma/dw/core.c channel_set_bit(dw, MASK.ERROR, dwc->mask); dw 146 drivers/dma/dw/core.c static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) dw 148 drivers/dma/dw/core.c channel_clear_bit(dw, CH_EN, dwc->mask); dw 149 drivers/dma/dw/core.c while (dma_readl(dw, CH_EN) & dwc->mask) dw 159 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 172 drivers/dma/dw/core.c channel_set_bit(dw, CH_EN, dwc->mask); dw 181 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 186 drivers/dma/dw/core.c if (dma_readl(dw, CH_EN) & dwc->mask) { dw 221 drivers/dma/dw/core.c channel_set_bit(dw, CH_EN, dwc->mask); dw 267 drivers/dma/dw/core.c static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc) dw 274 drivers/dma/dw/core.c if (dma_readl(dw, CH_EN) & dwc->mask) { dw 279 drivers/dma/dw/core.c dwc_chan_disable(dw, dwc); dw 298 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 302 drivers/dma/dw/core.c return dw->block2bytes(dwc, ctlhi, ctllo >> 4 & 7); dw 305 drivers/dma/dw/core.c static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc) dw 315 drivers/dma/dw/core.c status_xfer = dma_readl(dw, RAW.XFER); dw 319 drivers/dma/dw/core.c dma_writel(dw, CLEAR.XFER, dwc->mask); dw 353 drivers/dma/dw/core.c dwc_complete_all(dw, dwc); dw 412 drivers/dma/dw/core.c dwc_chan_disable(dw, dwc); dw 428 drivers/dma/dw/core.c static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc) dw 434 drivers/dma/dw/core.c dwc_scan_descriptors(dw, dwc); dw 448 drivers/dma/dw/core.c dma_writel(dw, CLEAR.ERROR, dwc->mask); dw 473 drivers/dma/dw/core.c struct dw_dma *dw = (struct dw_dma *)data; dw 479 drivers/dma/dw/core.c status_xfer = dma_readl(dw, RAW.XFER); dw 480 drivers/dma/dw/core.c status_err = dma_readl(dw, RAW.ERROR); dw 482 drivers/dma/dw/core.c dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err); dw 484 drivers/dma/dw/core.c for (i = 0; i < dw->dma.chancnt; i++) { dw 485 drivers/dma/dw/core.c dwc = &dw->chan[i]; dw 487 drivers/dma/dw/core.c dev_vdbg(dw->dma.dev, "Cyclic xfer is not implemented\n"); dw 489 drivers/dma/dw/core.c dwc_handle_error(dw, dwc); dw 491 drivers/dma/dw/core.c dwc_scan_descriptors(dw, dwc); dw 495 drivers/dma/dw/core.c channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); dw 496 drivers/dma/dw/core.c channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); dw 501 drivers/dma/dw/core.c struct dw_dma *dw = dev_id; dw 505 drivers/dma/dw/core.c if (!dw->in_use) dw 508 drivers/dma/dw/core.c status = dma_readl(dw, STATUS_INT); dw 509 drivers/dma/dw/core.c dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status); dw 519 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); dw 520 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); dw 521 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); dw 523 drivers/dma/dw/core.c status = dma_readl(dw, STATUS_INT); dw 525 drivers/dma/dw/core.c dev_err(dw->dma.dev, dw 530 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); dw 531 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); dw 532 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); dw 533 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1); dw 534 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1); dw 537 drivers/dma/dw/core.c tasklet_schedule(&dw->tasklet); dw 549 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 558 drivers/dma/dw/core.c unsigned int data_width = dw->pdata->data_width[m_master]; dw 575 drivers/dma/dw/core.c ctllo = dw->prepare_ctllo(dwc) dw 588 drivers/dma/dw/core.c ctlhi = dw->bytes2block(dwc, len - offset, src_width, &xfer_count); dw 627 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 637 drivers/dma/dw/core.c unsigned int data_width = dw->pdata->data_width[m_master]; dw 655 drivers/dma/dw/core.c ctllo = dw->prepare_ctllo(dwc) dw 678 drivers/dma/dw/core.c ctlhi = dw->bytes2block(dwc, len, mem_width, &dlen); dw 705 drivers/dma/dw/core.c ctllo = dw->prepare_ctllo(dwc) dw 726 drivers/dma/dw/core.c ctlhi = dw->bytes2block(dwc, len, reg_width, &dlen); dw 790 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 794 drivers/dma/dw/core.c dw->encode_maxburst(dwc, &dwc->dma_sconfig.src_maxburst); dw 795 drivers/dma/dw/core.c dw->encode_maxburst(dwc, &dwc->dma_sconfig.dst_maxburst); dw 802 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 805 drivers/dma/dw/core.c dw->suspend_chan(dwc, drain); dw 827 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 829 drivers/dma/dw/core.c dw->resume_chan(dwc, drain); dw 852 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 863 drivers/dma/dw/core.c dwc_chan_disable(dw, dwc); dw 955 drivers/dma/dw/core.c void do_dw_dma_off(struct dw_dma *dw) dw 959 drivers/dma/dw/core.c dma_writel(dw, CFG, 0); dw 961 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); dw 962 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); dw 963 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask); dw 964 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask); dw 965 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); dw 967 drivers/dma/dw/core.c while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) dw 970 drivers/dma/dw/core.c for (i = 0; i < dw->dma.chancnt; i++) dw 971 drivers/dma/dw/core.c clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags); dw 974 drivers/dma/dw/core.c void do_dw_dma_on(struct dw_dma *dw) dw 976 drivers/dma/dw/core.c dma_writel(dw, CFG, DW_CFG_DMA_EN); dw 982 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 987 drivers/dma/dw/core.c if (dma_readl(dw, CH_EN) & dwc->mask) { dw 1009 drivers/dma/dw/core.c if (!dw->in_use) dw 1010 drivers/dma/dw/core.c do_dw_dma_on(dw); dw 1011 drivers/dma/dw/core.c dw->in_use |= dwc->mask; dw 1019 drivers/dma/dw/core.c struct dw_dma *dw = to_dw_dma(chan->device); dw 1038 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.XFER, dwc->mask); dw 1039 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.BLOCK, dwc->mask); dw 1040 drivers/dma/dw/core.c channel_clear_bit(dw, MASK.ERROR, dwc->mask); dw 1045 drivers/dma/dw/core.c dw->in_use &= ~dwc->mask; dw 1046 drivers/dma/dw/core.c if (!dw->in_use) dw 1047 drivers/dma/dw/core.c do_dw_dma_off(dw); dw 1054 drivers/dma/dw/core.c struct dw_dma *dw = chip->dw; dw 1061 drivers/dma/dw/core.c dw->pdata = devm_kzalloc(chip->dev, sizeof(*dw->pdata), GFP_KERNEL); dw 1062 drivers/dma/dw/core.c if (!dw->pdata) dw 1065 drivers/dma/dw/core.c dw->regs = chip->regs; dw 1070 drivers/dma/dw/core.c dw_params = dma_readl(dw, DW_PARAMS); dw 1080 drivers/dma/dw/core.c pdata = dw->pdata; dw 1089 drivers/dma/dw/core.c pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); dw 1098 drivers/dma/dw/core.c memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata)); dw 1101 drivers/dma/dw/core.c pdata = dw->pdata; dw 1104 drivers/dma/dw/core.c dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan), dw 1106 drivers/dma/dw/core.c if (!dw->chan) { dw 1112 drivers/dma/dw/core.c dw->all_chan_mask = (1 << pdata->nr_channels) - 1; dw 1115 drivers/dma/dw/core.c dw->disable(dw); dw 1118 drivers/dma/dw/core.c dw->set_device_name(dw, chip->id); dw 1121 drivers/dma/dw/core.c dw->desc_pool = dmam_pool_create(dw->name, chip->dev, dw 1123 drivers/dma/dw/core.c if (!dw->desc_pool) { dw 1129 drivers/dma/dw/core.c tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw); dw 1132 drivers/dma/dw/core.c dw->name, dw); dw 1136 drivers/dma/dw/core.c INIT_LIST_HEAD(&dw->dma.channels); dw 1138 drivers/dma/dw/core.c struct dw_dma_chan *dwc = &dw->chan[i]; dw 1140 drivers/dma/dw/core.c dwc->chan.device = &dw->dma; dw 1144 drivers/dma/dw/core.c &dw->dma.channels); dw 1146 drivers/dma/dw/core.c list_add(&dwc->chan.device_node, &dw->dma.channels); dw 1154 drivers/dma/dw/core.c dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; dw 1161 drivers/dma/dw/core.c channel_clear_bit(dw, CH_EN, dwc->mask); dw 1168 drivers/dma/dw/core.c void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; dw 1190 drivers/dma/dw/core.c dma_writel(dw, CLEAR.XFER, dw->all_chan_mask); dw 1191 drivers/dma/dw/core.c dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask); dw 1192 drivers/dma/dw/core.c dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask); dw 1193 drivers/dma/dw/core.c dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask); dw 1194 drivers/dma/dw/core.c dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask); dw 1197 drivers/dma/dw/core.c dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); dw 1198 drivers/dma/dw/core.c dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); dw 1199 drivers/dma/dw/core.c dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); dw 1201 drivers/dma/dw/core.c dw->dma.dev = chip->dev; dw 1202 drivers/dma/dw/core.c dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources; dw 1203 drivers/dma/dw/core.c dw->dma.device_free_chan_resources = dwc_free_chan_resources; dw 1205 drivers/dma/dw/core.c dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy; dw 1206 drivers/dma/dw/core.c dw->dma.device_prep_slave_sg = dwc_prep_slave_sg; dw 1208 drivers/dma/dw/core.c dw->dma.device_config = dwc_config; dw 1209 drivers/dma/dw/core.c dw->dma.device_pause = dwc_pause; dw 1210 drivers/dma/dw/core.c dw->dma.device_resume = dwc_resume; dw 1211 drivers/dma/dw/core.c dw->dma.device_terminate_all = dwc_terminate_all; dw 1213 drivers/dma/dw/core.c dw->dma.device_tx_status = dwc_tx_status; dw 1214 drivers/dma/dw/core.c dw->dma.device_issue_pending = dwc_issue_pending; dw 1217 drivers/dma/dw/core.c dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; dw 1218 drivers/dma/dw/core.c dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; dw 1219 drivers/dma/dw/core.c dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | dw 1221 drivers/dma/dw/core.c dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; dw 1223 drivers/dma/dw/core.c err = dma_async_device_register(&dw->dma); dw 1235 drivers/dma/dw/core.c free_irq(chip->irq, dw); dw 1243 drivers/dma/dw/core.c struct dw_dma *dw = chip->dw; dw 1248 drivers/dma/dw/core.c do_dw_dma_off(dw); dw 1249 drivers/dma/dw/core.c dma_async_device_unregister(&dw->dma); dw 1251 drivers/dma/dw/core.c free_irq(chip->irq, dw); dw 1252 drivers/dma/dw/core.c tasklet_kill(&dw->tasklet); dw 1254 drivers/dma/dw/core.c list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, dw 1257 drivers/dma/dw/core.c channel_clear_bit(dw, CH_EN, dwc->mask); dw 1266 drivers/dma/dw/core.c struct dw_dma *dw = chip->dw; dw 1268 drivers/dma/dw/core.c dw->disable(dw); dw 1275 drivers/dma/dw/core.c struct dw_dma *dw = chip->dw; dw 1277 drivers/dma/dw/core.c dw->enable(dw); dw 16 drivers/dma/dw/dw.c struct dw_dma *dw = to_dw_dma(dwc->chan.device); dw 23 drivers/dma/dw/dw.c cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); dw 92 drivers/dma/dw/dw.c static void dw_dma_set_device_name(struct dw_dma *dw, int id) dw 94 drivers/dma/dw/dw.c snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); dw 97 drivers/dma/dw/dw.c static void dw_dma_disable(struct dw_dma *dw) dw 99 drivers/dma/dw/dw.c do_dw_dma_off(dw); dw 102 drivers/dma/dw/dw.c static void dw_dma_enable(struct dw_dma *dw) dw 104 drivers/dma/dw/dw.c do_dw_dma_on(dw); dw 109 drivers/dma/dw/dw.c struct dw_dma *dw; dw 111 drivers/dma/dw/dw.c dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); dw 112 drivers/dma/dw/dw.c if (!dw) dw 116 drivers/dma/dw/dw.c dw->initialize_chan = dw_dma_initialize_chan; dw 117 drivers/dma/dw/dw.c dw->suspend_chan = dw_dma_suspend_chan; dw 118 drivers/dma/dw/dw.c dw->resume_chan = dw_dma_resume_chan; dw 119 drivers/dma/dw/dw.c dw->prepare_ctllo = dw_dma_prepare_ctllo; dw 120 drivers/dma/dw/dw.c dw->encode_maxburst = dw_dma_encode_maxburst; dw 121 drivers/dma/dw/dw.c dw->bytes2block = dw_dma_bytes2block; dw 122 drivers/dma/dw/dw.c dw->block2bytes = dw_dma_block2bytes; dw 125 drivers/dma/dw/dw.c dw->set_device_name = dw_dma_set_device_name; dw 126 drivers/dma/dw/dw.c dw->disable = dw_dma_disable; dw 127 drivers/dma/dw/dw.c dw->enable = dw_dma_enable; dw 129 drivers/dma/dw/dw.c chip->dw = dw; dw 89 drivers/dma/dw/idma32.c static void idma32_set_device_name(struct dw_dma *dw, int id) dw 91 drivers/dma/dw/idma32.c snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); dw 100 drivers/dma/dw/idma32.c static void idma32_fifo_partition(struct dw_dma *dw) dw 113 drivers/dma/dw/idma32.c idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); dw 114 drivers/dma/dw/idma32.c idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); dw 117 drivers/dma/dw/idma32.c static void idma32_disable(struct dw_dma *dw) dw 119 drivers/dma/dw/idma32.c do_dw_dma_off(dw); dw 120 drivers/dma/dw/idma32.c idma32_fifo_partition(dw); dw 123 drivers/dma/dw/idma32.c static void idma32_enable(struct dw_dma *dw) dw 125 drivers/dma/dw/idma32.c idma32_fifo_partition(dw); dw 126 drivers/dma/dw/idma32.c do_dw_dma_on(dw); dw 131 drivers/dma/dw/idma32.c struct dw_dma *dw; dw 133 drivers/dma/dw/idma32.c dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); dw 134 drivers/dma/dw/idma32.c if (!dw) dw 138 drivers/dma/dw/idma32.c dw->initialize_chan = idma32_initialize_chan; dw 139 drivers/dma/dw/idma32.c dw->suspend_chan = idma32_suspend_chan; dw 140 drivers/dma/dw/idma32.c dw->resume_chan = idma32_resume_chan; dw 141 drivers/dma/dw/idma32.c dw->prepare_ctllo = idma32_prepare_ctllo; dw 142 drivers/dma/dw/idma32.c dw->encode_maxburst = idma32_encode_maxburst; dw 143 drivers/dma/dw/idma32.c dw->bytes2block = idma32_bytes2block; dw 144 drivers/dma/dw/idma32.c dw->block2bytes = idma32_block2bytes; dw 147 drivers/dma/dw/idma32.c dw->set_device_name = idma32_set_device_name; dw 148 drivers/dma/dw/idma32.c dw->disable = idma32_disable; dw 149 drivers/dma/dw/idma32.c dw->enable = idma32_enable; dw 151 drivers/dma/dw/idma32.c chip->dw = dw; dw 18 drivers/dma/dw/internal.h void do_dw_dma_on(struct dw_dma *dw); dw 19 drivers/dma/dw/internal.h void do_dw_dma_off(struct dw_dma *dw); dw 27 drivers/dma/dw/internal.h void dw_dma_acpi_controller_register(struct dw_dma *dw); dw 28 drivers/dma/dw/internal.h void dw_dma_acpi_controller_free(struct dw_dma *dw); dw 30 drivers/dma/dw/internal.h static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} dw 31 drivers/dma/dw/internal.h static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} dw 38 drivers/dma/dw/internal.h void dw_dma_of_controller_register(struct dw_dma *dw); dw 39 drivers/dma/dw/internal.h void dw_dma_of_controller_free(struct dw_dma *dw); dw 45 drivers/dma/dw/internal.h static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} dw 46 drivers/dma/dw/internal.h static inline void dw_dma_of_controller_free(struct dw_dma *dw) {} dw 19 drivers/dma/dw/of.c struct dw_dma *dw = ofdma->of_dma_data; dw 21 drivers/dma/dw/of.c .dma_dev = dw->dma.dev, dw 35 drivers/dma/dw/of.c slave.m_master >= dw->pdata->nr_masters || dw 36 drivers/dma/dw/of.c slave.p_master >= dw->pdata->nr_masters)) dw 110 drivers/dma/dw/of.c void dw_dma_of_controller_register(struct dw_dma *dw) dw 112 drivers/dma/dw/of.c struct device *dev = dw->dma.dev; dw 118 drivers/dma/dw/of.c ret = of_dma_controller_register(dev->of_node, dw_dma_of_xlate, dw); dw 123 drivers/dma/dw/of.c void dw_dma_of_controller_free(struct dw_dma *dw) dw 125 drivers/dma/dw/of.c struct device *dev = dw->dma.dev; dw 84 drivers/dma/dw/platform.c dw_dma_of_controller_register(chip->dw); dw 86 drivers/dma/dw/platform.c dw_dma_acpi_controller_register(chip->dw); dw 102 drivers/dma/dw/platform.c dw_dma_acpi_controller_free(chip->dw); dw 104 drivers/dma/dw/platform.c dw_dma_of_controller_free(chip->dw); dw 333 drivers/dma/dw/regs.h void (*set_device_name)(struct dw_dma *dw, int id); dw 334 drivers/dma/dw/regs.h void (*disable)(struct dw_dma *dw); dw 335 drivers/dma/dw/regs.h void (*enable)(struct dw_dma *dw); dw 341 drivers/dma/dw/regs.h static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw) dw 343 drivers/dma/dw/regs.h return dw->regs; dw 346 drivers/dma/dw/regs.h #define dma_readl(dw, name) \ dw 347 drivers/dma/dw/regs.h readl(&(__dw_regs(dw)->name)) dw 348 drivers/dma/dw/regs.h #define dma_writel(dw, name, val) \ dw 349 drivers/dma/dw/regs.h writel((val), &(__dw_regs(dw)->name)) dw 351 drivers/dma/dw/regs.h #define idma32_readq(dw, name) \ dw 352 drivers/dma/dw/regs.h hi_lo_readq(&(__dw_regs(dw)->name)) dw 353 drivers/dma/dw/regs.h #define idma32_writeq(dw, name, val) \ dw 354 drivers/dma/dw/regs.h hi_lo_writeq((val), &(__dw_regs(dw)->name)) dw 356 drivers/dma/dw/regs.h #define channel_set_bit(dw, reg, mask) \ dw 357 drivers/dma/dw/regs.h dma_writel(dw, reg, ((mask) << 8) | (mask)) dw 358 drivers/dma/dw/regs.h #define channel_clear_bit(dw, reg, mask) \ dw 359 drivers/dma/dw/regs.h dma_writel(dw, reg, ((mask) << 8) | 0) dw 486 drivers/edac/i5100_edac.c u32 dw; dw 496 drivers/edac/i5100_edac.c pci_read_config_dword(pdev, I5100_VALIDLOG, &dw); dw 498 drivers/edac/i5100_edac.c if (i5100_validlog_redmemvalid(dw)) { dw 505 drivers/edac/i5100_edac.c if (i5100_validlog_recmemvalid(dw)) { dw 527 drivers/edac/i5100_edac.c if (i5100_validlog_nrecmemvalid(dw)) { dw 549 drivers/edac/i5100_edac.c pci_write_config_dword(pdev, I5100_VALIDLOG, dw); dw 555 drivers/edac/i5100_edac.c u32 dw, dw2; dw 557 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_FERR_NF_MEM, &dw); dw 558 drivers/edac/i5100_edac.c if (i5100_ferr_nf_mem_any(dw)) { dw 562 drivers/edac/i5100_edac.c i5100_read_log(mci, i5100_ferr_nf_mem_chan_indx(dw), dw 563 drivers/edac/i5100_edac.c i5100_ferr_nf_mem_any(dw), dw 568 drivers/edac/i5100_edac.c pci_write_config_dword(priv->mc, I5100_FERR_NF_MEM, dw); dw 583 drivers/edac/i5100_edac.c u32 dw; dw 585 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 589 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 591 drivers/edac/i5100_edac.c if (i5100_mc_scrbdone(dw)) { dw 592 drivers/edac/i5100_edac.c dw |= I5100_MC_SCRBEN_MASK; dw 593 drivers/edac/i5100_edac.c pci_write_config_dword(priv->mc, I5100_MC, dw); dw 594 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 607 drivers/edac/i5100_edac.c u32 dw; dw 609 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 612 drivers/edac/i5100_edac.c dw |= I5100_MC_SCRBEN_MASK; dw 617 drivers/edac/i5100_edac.c dw &= ~I5100_MC_SCRBEN_MASK; dw 620 drivers/edac/i5100_edac.c pci_write_config_dword(priv->mc, I5100_MC, dw); dw 622 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 624 drivers/edac/i5100_edac.c bandwidth = 5900000 * i5100_mc_scrben(dw); dw 632 drivers/edac/i5100_edac.c u32 dw; dw 634 drivers/edac/i5100_edac.c pci_read_config_dword(priv->mc, I5100_MC, &dw); dw 636 drivers/edac/i5100_edac.c return 5900000 * i5100_mc_scrben(dw); dw 807 drivers/edac/i5100_edac.c u32 dw; dw 836 drivers/edac/i5100_edac.c pci_read_config_dword(mms[i], I5100_DMIR + j * 4, &dw); dw 839 drivers/edac/i5100_edac.c (u64) i5100_dmir_limit(dw) << 28; dw 842 drivers/edac/i5100_edac.c i5100_dmir_rank(dw, k); dw 1001 drivers/edac/i5100_edac.c u32 dw; dw 1014 drivers/edac/i5100_edac.c pci_read_config_dword(pdev, I5100_MC, &dw); dw 1015 drivers/edac/i5100_edac.c if (!i5100_mc_errdeten(dw)) { dw 1022 drivers/edac/i5100_edac.c pci_read_config_dword(pdev, I5100_MS, &dw); dw 1023 drivers/edac/i5100_edac.c ranksperch = !!(dw & (1 << 8)) * 2 + 4; dw 1026 drivers/edac/i5100_edac.c pci_read_config_dword(pdev, I5100_EMASK_MEM, &dw); dw 1027 drivers/edac/i5100_edac.c dw &= ~I5100_FERR_NF_MEM_ANY_MASK; dw 1028 drivers/edac/i5100_edac.c pci_write_config_dword(pdev, I5100_EMASK_MEM, dw); dw 1099 drivers/edac/i5100_edac.c pci_read_config_dword(pdev, I5100_MC, &dw); dw 1100 drivers/edac/i5100_edac.c if (i5100_mc_scrben(dw)) { dw 148 drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h __field(u32, dw) dw 155 drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h __entry->dw = p->job->ibs[i].length_dw; dw 160 drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h __entry->bo_list, __entry->ring, __entry->dw, dw 247 drivers/gpu/drm/amd/amdgpu/cik_ih.c uint32_t dw[4]; dw 249 drivers/gpu/drm/amd/amdgpu/cik_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 250 drivers/gpu/drm/amd/amdgpu/cik_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 251 drivers/gpu/drm/amd/amdgpu/cik_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 252 drivers/gpu/drm/amd/amdgpu/cik_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 255 drivers/gpu/drm/amd/amdgpu/cik_ih.c entry->src_id = dw[0] & 0xff; dw 256 drivers/gpu/drm/amd/amdgpu/cik_ih.c entry->src_data[0] = dw[1] & 0xfffffff; dw 257 drivers/gpu/drm/amd/amdgpu/cik_ih.c entry->ring_id = dw[2] & 0xff; dw 258 drivers/gpu/drm/amd/amdgpu/cik_ih.c entry->vmid = (dw[2] >> 8) & 0xff; dw 259 drivers/gpu/drm/amd/amdgpu/cik_ih.c entry->pasid = (dw[2] >> 16) & 0xffff; dw 226 drivers/gpu/drm/amd/amdgpu/cz_ih.c uint32_t dw[4]; dw 228 drivers/gpu/drm/amd/amdgpu/cz_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 229 drivers/gpu/drm/amd/amdgpu/cz_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 230 drivers/gpu/drm/amd/amdgpu/cz_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 231 drivers/gpu/drm/amd/amdgpu/cz_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 234 drivers/gpu/drm/amd/amdgpu/cz_ih.c entry->src_id = dw[0] & 0xff; dw 235 drivers/gpu/drm/amd/amdgpu/cz_ih.c entry->src_data[0] = dw[1] & 0xfffffff; dw 236 drivers/gpu/drm/amd/amdgpu/cz_ih.c entry->ring_id = dw[2] & 0xff; dw 237 drivers/gpu/drm/amd/amdgpu/cz_ih.c entry->vmid = (dw[2] >> 8) & 0xff; dw 238 drivers/gpu/drm/amd/amdgpu/cz_ih.c entry->pasid = (dw[2] >> 16) & 0xffff; dw 226 drivers/gpu/drm/amd/amdgpu/iceland_ih.c uint32_t dw[4]; dw 228 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 229 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 230 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 231 drivers/gpu/drm/amd/amdgpu/iceland_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 234 drivers/gpu/drm/amd/amdgpu/iceland_ih.c entry->src_id = dw[0] & 0xff; dw 235 drivers/gpu/drm/amd/amdgpu/iceland_ih.c entry->src_data[0] = dw[1] & 0xfffffff; dw 236 drivers/gpu/drm/amd/amdgpu/iceland_ih.c entry->ring_id = dw[2] & 0xff; dw 237 drivers/gpu/drm/amd/amdgpu/iceland_ih.c entry->vmid = (dw[2] >> 8) & 0xff; dw 238 drivers/gpu/drm/amd/amdgpu/iceland_ih.c entry->pasid = (dw[2] >> 16) & 0xffff; dw 258 drivers/gpu/drm/amd/amdgpu/navi10_ih.c uint32_t dw[8]; dw 260 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 261 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 262 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 263 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 264 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[4] = le32_to_cpu(ih->ring[ring_index + 4]); dw 265 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[5] = le32_to_cpu(ih->ring[ring_index + 5]); dw 266 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[6] = le32_to_cpu(ih->ring[ring_index + 6]); dw 267 drivers/gpu/drm/amd/amdgpu/navi10_ih.c dw[7] = le32_to_cpu(ih->ring[ring_index + 7]); dw 269 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->client_id = dw[0] & 0xff; dw 270 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->src_id = (dw[0] >> 8) & 0xff; dw 271 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->ring_id = (dw[0] >> 16) & 0xff; dw 272 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->vmid = (dw[0] >> 24) & 0xf; dw 273 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->vmid_src = (dw[0] >> 31); dw 274 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->timestamp = dw[1] | ((u64)(dw[2] & 0xffff) << 32); dw 275 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->timestamp_src = dw[2] >> 31; dw 276 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->pasid = dw[3] & 0xffff; dw 277 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->pasid_src = dw[3] >> 31; dw 278 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->src_data[0] = dw[4]; dw 279 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->src_data[1] = dw[5]; dw 280 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->src_data[2] = dw[6]; dw 281 drivers/gpu/drm/amd/amdgpu/navi10_ih.c entry->src_data[3] = dw[7]; dw 129 drivers/gpu/drm/amd/amdgpu/si_ih.c uint32_t dw[4]; dw 131 drivers/gpu/drm/amd/amdgpu/si_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 132 drivers/gpu/drm/amd/amdgpu/si_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 133 drivers/gpu/drm/amd/amdgpu/si_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 134 drivers/gpu/drm/amd/amdgpu/si_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 137 drivers/gpu/drm/amd/amdgpu/si_ih.c entry->src_id = dw[0] & 0xff; dw 138 drivers/gpu/drm/amd/amdgpu/si_ih.c entry->src_data[0] = dw[1] & 0xfffffff; dw 139 drivers/gpu/drm/amd/amdgpu/si_ih.c entry->ring_id = dw[2] & 0xff; dw 140 drivers/gpu/drm/amd/amdgpu/si_ih.c entry->vmid = (dw[2] >> 8) & 0xff; dw 228 drivers/gpu/drm/amd/amdgpu/tonga_ih.c uint32_t dw[4]; dw 230 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 231 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 232 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 233 drivers/gpu/drm/amd/amdgpu/tonga_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 236 drivers/gpu/drm/amd/amdgpu/tonga_ih.c entry->src_id = dw[0] & 0xff; dw 237 drivers/gpu/drm/amd/amdgpu/tonga_ih.c entry->src_data[0] = dw[1] & 0xfffffff; dw 238 drivers/gpu/drm/amd/amdgpu/tonga_ih.c entry->ring_id = dw[2] & 0xff; dw 239 drivers/gpu/drm/amd/amdgpu/tonga_ih.c entry->vmid = (dw[2] >> 8) & 0xff; dw 240 drivers/gpu/drm/amd/amdgpu/tonga_ih.c entry->pasid = (dw[2] >> 16) & 0xffff; dw 441 drivers/gpu/drm/amd/amdgpu/vega10_ih.c uint32_t dw[8]; dw 443 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); dw 444 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); dw 445 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); dw 446 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); dw 447 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[4] = le32_to_cpu(ih->ring[ring_index + 4]); dw 448 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[5] = le32_to_cpu(ih->ring[ring_index + 5]); dw 449 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[6] = le32_to_cpu(ih->ring[ring_index + 6]); dw 450 drivers/gpu/drm/amd/amdgpu/vega10_ih.c dw[7] = le32_to_cpu(ih->ring[ring_index + 7]); dw 452 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->client_id = dw[0] & 0xff; dw 453 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->src_id = (dw[0] >> 8) & 0xff; dw 454 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->ring_id = (dw[0] >> 16) & 0xff; dw 455 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->vmid = (dw[0] >> 24) & 0xf; dw 456 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->vmid_src = (dw[0] >> 31); dw 457 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->timestamp = dw[1] | ((u64)(dw[2] & 0xffff) << 32); dw 458 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->timestamp_src = dw[2] >> 31; dw 459 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->pasid = dw[3] & 0xffff; dw 460 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->pasid_src = dw[3] >> 31; dw 461 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->src_data[0] = dw[4]; dw 462 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->src_data[1] = dw[5]; dw 463 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->src_data[2] = dw[6]; dw 464 drivers/gpu/drm/amd/amdgpu/vega10_ih.c entry->src_data[3] = dw[7]; dw 153 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, dw 156 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *src = dw->buf_src + offset; dw 157 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *dst = dw->buf_dst + offset; dw 158 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *end = dw->buf_src + offset + bytes; dw 181 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, dw 184 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *src = dw->buf_src + offset; dw 185 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *dst = dw->buf_dst + offset; dw 186 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c u32 *end = dw->buf_src + offset + bytes; dw 192 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c cs = dw->cs[dw->iec_offset++]; dw 193 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c if (dw->iec_offset >= 192) dw 194 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->iec_offset = 0; dw 196 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c i = dw->channels; dw 209 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c static void dw_hdmi_create_cs(struct snd_dw_hdmi *dw, dw 217 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c memset(dw->cs, 0, sizeof(dw->cs)); dw 227 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->cs[i * 8 + j][ch] = (c & 1) << 2; dw 230 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->cs[0][0] |= BIT(4); dw 233 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c static void dw_hdmi_start_dma(struct snd_dw_hdmi *dw) dw 235 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c void __iomem *base = dw->data.base; dw 236 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c unsigned offset = dw->buf_offset; dw 237 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c unsigned period = dw->buf_period; dw 240 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->reformat(dw, offset, period); dw 246 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c start = dw->buf_addr + offset; dw 257 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c if (offset >= dw->buf_size) dw 259 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_offset = offset; dw 262 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c static void dw_hdmi_stop_dma(struct snd_dw_hdmi *dw) dw 265 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(~0, dw->data.base + HDMI_AHB_DMA_MASK); dw 266 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(HDMI_AHB_DMA_STOP_STOP, dw->data.base + HDMI_AHB_DMA_STOP); dw 271 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = data; dw 275 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c stat = readb_relaxed(dw->data.base + HDMI_IH_AHBDMAAUD_STAT0); dw 279 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(stat, dw->data.base + HDMI_IH_AHBDMAAUD_STAT0); dw 281 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c substream = dw->substream; dw 285 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_lock(&dw->lock); dw 286 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c if (dw->substream) dw 287 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_start_dma(dw); dw 288 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_unlock(&dw->lock); dw 321 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = substream->private_data; dw 322 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c void __iomem *base = dw->data.base; dw 327 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c ret = snd_pcm_hw_constraint_eld(runtime, dw->data.eld); dw 359 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c ret = request_irq(dw->data.irq, snd_dw_hdmi_irq, IRQF_SHARED, dw 360 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c "dw-hdmi-audio", dw); dw 374 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = substream->private_data; dw 378 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->data.base + HDMI_IH_MUTE_AHBDMAAUD_STAT0); dw 380 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c free_irq(dw->data.irq, dw); dw 401 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = substream->private_data; dw 405 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c switch (dw->revision) { dw 424 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_set_sample_rate(dw->data.hdmi, runtime->rate); dw 433 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(threshold, dw->data.base + HDMI_AHB_DMA_THRSLD); dw 434 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(conf0, dw->data.base + HDMI_AHB_DMA_CONF0); dw 435 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c writeb_relaxed(conf1, dw->data.base + HDMI_AHB_DMA_CONF1); dw 437 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_set_channel_count(dw->data.hdmi, runtime->channels); dw 438 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_set_channel_allocation(dw->data.hdmi, ca); dw 442 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->reformat = dw_hdmi_reformat_iec958; dw 445 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_create_cs(dw, runtime); dw 446 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->reformat = dw_hdmi_reformat_s24; dw 449 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->iec_offset = 0; dw 450 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->channels = runtime->channels; dw 451 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_src = runtime->dma_area; dw 452 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_dst = substream->dma_buffer.area; dw 453 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_addr = substream->dma_buffer.addr; dw 454 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_period = snd_pcm_lib_period_bytes(substream); dw 455 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_size = snd_pcm_lib_buffer_bytes(substream); dw 462 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = substream->private_data; dw 468 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_lock_irqsave(&dw->lock, flags); dw 469 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->buf_offset = 0; dw 470 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->substream = substream; dw 471 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_start_dma(dw); dw 472 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_audio_enable(dw->data.hdmi); dw 473 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_unlock_irqrestore(&dw->lock, flags); dw 478 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_lock_irqsave(&dw->lock, flags); dw 479 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->substream = NULL; dw 480 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_stop_dma(dw); dw 481 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw_hdmi_audio_disable(dw->data.hdmi); dw 482 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_unlock_irqrestore(&dw->lock, flags); dw 496 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = substream->private_data; dw 502 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c return bytes_to_frames(runtime, dw->buf_offset); dw 521 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw; dw 547 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw = card->private_data; dw 548 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->card = card; dw 549 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->data = *data; dw 550 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->revision = revision; dw 552 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c spin_lock_init(&dw->lock); dw 558 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c dw->pcm = pcm; dw 559 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c pcm->private_data = dw; dw 574 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c platform_set_drvdata(pdev, dw); dw 585 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = platform_get_drvdata(pdev); dw 587 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c snd_card_free(dw->card); dw 599 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = dev_get_drvdata(dev); dw 601 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c snd_power_change_state(dw->card, SNDRV_CTL_POWER_D3cold); dw 608 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c struct snd_dw_hdmi *dw = dev_get_drvdata(dev); dw 610 drivers/gpu/drm/bridge/synopsys/dw-hdmi-ahb-audio.c snd_power_change_state(dw->card, SNDRV_CTL_POWER_D0); dw 526 drivers/gpu/drm/exynos/exynos_drm_ipp.c int dw, dh; dw 537 drivers/gpu/drm/exynos/exynos_drm_ipp.c dw = (!swap) ? dst->w : dst->h; dw 540 drivers/gpu/drm/exynos/exynos_drm_ipp.c if (!__scale_limit_check(src->w, dw, lh->min, lh->max) || dw 885 drivers/gpu/drm/i915/gem/selftests/huge_pages.c u32 dw, dw 896 drivers/gpu/drm/i915/gem/selftests/huge_pages.c return igt_gpu_fill_dw(vma, ctx, engine, dw * sizeof(u32), dw 172 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c unsigned int dw) dw 206 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c (dw * real_page_count(obj)) << PAGE_SHIFT | dw 207 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c (dw * sizeof(u32)), dw 209 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw); dw 369 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c unsigned long ncontexts, ndwords, dw; dw 393 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 411 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = gpu_fill(obj, ctx, engine, dw); dw 414 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ndwords, dw, max_dwords(obj), dw 420 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (++dw == max_dwords(obj)) { dw 422 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 432 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ncontexts = dw = 0; dw 435 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c min_t(unsigned int, ndwords - dw, max_dwords(obj)); dw 441 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw += rem; dw 499 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c unsigned long ncontexts, ndwords, dw; dw 507 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 530 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = gpu_fill(obj, ctx, engine, dw); dw 533 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ndwords, dw, max_dwords(obj), dw 540 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (++dw == max_dwords(obj)) { dw 542 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 553 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ncontexts = dw = 0; dw 556 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c min_t(unsigned int, ndwords - dw, max_dwords(obj)); dw 562 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw += rem; dw 1046 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c unsigned long idx, ndwords, dw; dw 1083 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 1103 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c err = gpu_fill(obj, ctx, engine, dw); dw 1106 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c ndwords, dw, max_dwords(obj), dw 1112 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c if (++dw == max_dwords(obj)) { dw 1114 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 1122 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw = 0; dw 1126 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c min_t(unsigned int, ndwords - dw, max_dwords(obj)); dw 1137 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c dw += rem; dw 670 drivers/gpu/drm/i915/gt/intel_engine_cs.c int dw = -ENOMEM; dw 693 drivers/gpu/drm/i915/gt/intel_engine_cs.c dw = intel_timeline_pin(&frame->timeline); dw 694 drivers/gpu/drm/i915/gt/intel_engine_cs.c if (dw < 0) dw 697 drivers/gpu/drm/i915/gt/intel_engine_cs.c dw = engine->emit_fini_breadcrumb(&frame->rq, frame->cs) - frame->cs; dw 698 drivers/gpu/drm/i915/gt/intel_engine_cs.c GEM_BUG_ON(dw & 1); /* RING_TAIL must be qword aligned */ dw 706 drivers/gpu/drm/i915/gt/intel_engine_cs.c return dw; dw 163 drivers/gpu/drm/i915/gt/intel_gt_irq.c u32 dw; dw 167 drivers/gpu/drm/i915/gt/intel_gt_irq.c dw = raw_reg_read(regs, GEN11_GT_INTR_DW(bank)); dw 168 drivers/gpu/drm/i915/gt/intel_gt_irq.c if (dw & BIT(bit)) { dw 143 drivers/gpu/drm/i915/gvt/execlist.c ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg); dw 160 drivers/gpu/drm/i915/gvt/execlist.c vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw; dw 523 drivers/gpu/drm/i915/gvt/execlist.c ctx_status_ptr.dw = vgpu_vreg(vgpu, ctx_status_ptr_reg); dw 526 drivers/gpu/drm/i915/gvt/execlist.c vgpu_vreg(vgpu, ctx_status_ptr_reg) = ctx_status_ptr.dw; dw 84 drivers/gpu/drm/i915/gvt/execlist.h u32 dw; dw 1765 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_CL_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1766 drivers/gpu/drm/i915/i915_reg.h 4 * (dw)) dw 1793 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_COMP_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1794 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_COMP + 4 * (dw)) dw 1854 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_PCS_DW_AUX(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1855 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_PCS_AUX + 4 * (dw)) dw 1856 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_PCS_DW_GRP(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1857 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_PCS_GRP + 4 * (dw)) dw 1858 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_PCS_DW_LN(dw, ln, phy) (_ICL_COMBOPHY(phy) + \ dw 1859 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_PCS_LN(ln) + 4 * (dw)) dw 1878 drivers/gpu/drm/i915/i915_reg.h #define _CNL_PORT_TX_DW_GRP(dw, port) (_PICK((port), \ dw 1885 drivers/gpu/drm/i915/i915_reg.h 4 * (dw)) dw 1886 drivers/gpu/drm/i915/i915_reg.h #define _CNL_PORT_TX_DW_LN0(dw, port) (_PICK((port), \ dw 1893 drivers/gpu/drm/i915/i915_reg.h 4 * (dw)) dw 1899 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_TX_DW_AUX(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1900 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_TX_AUX + 4 * (dw)) dw 1901 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_TX_DW_GRP(dw, phy) (_ICL_COMBOPHY(phy) + \ dw 1902 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_TX_GRP + 4 * (dw)) dw 1903 drivers/gpu/drm/i915/i915_reg.h #define _ICL_PORT_TX_DW_LN(dw, ln, phy) (_ICL_COMBOPHY(phy) + \ dw 1904 drivers/gpu/drm/i915/i915_reg.h _ICL_PORT_TX_LN(ln) + 4 * (dw)) dw 253 drivers/gpu/drm/i915/i915_utils.h static inline void drain_delayed_work(struct delayed_work *dw) dw 256 drivers/gpu/drm/i915/i915_utils.h while (flush_delayed_work(dw)) dw 258 drivers/gpu/drm/i915/i915_utils.h } while (delayed_work_pending(dw)); dw 216 drivers/gpu/drm/nouveau/dispnv50/atom.h u16 dw; dw 51 drivers/gpu/drm/nouveau/dispnv50/ovly507e.c evo_data(push, asyw->scale.dw); dw 283 drivers/gpu/drm/nouveau/dispnv50/wndw.c asyw->scale.dw = asyw->state.crtc_w; dw 3944 drivers/gpu/drm/omapdrm/dss/dsi.c u16 dw, dh; dw 3953 drivers/gpu/drm/omapdrm/dss/dsi.c dw = dsi->vm.hactive; dw 3957 drivers/gpu/drm/omapdrm/dss/dsi.c dsi->update_bytes = dw * dh * dw 35 drivers/gpu/drm/radeon/radeon_trace.h __field(u32, dw) dw 41 drivers/gpu/drm/radeon/radeon_trace.h __entry->dw = p->chunk_ib->length_dw; dw 46 drivers/gpu/drm/radeon/radeon_trace.h __entry->ring, __entry->dw, dw 102 drivers/infiniband/hw/hfi1/exp_rcv.h #define KDETH_SET(dw, field, val) do { \ dw 103 drivers/infiniband/hw/hfi1/exp_rcv.h u32 dwval = le32_to_cpu(dw); \ dw 107 drivers/infiniband/hw/hfi1/exp_rcv.h dw = cpu_to_le32(dwval); \ dw 110 drivers/infiniband/hw/hfi1/exp_rcv.h #define KDETH_RESET(dw, field, val) ({ dw = 0; KDETH_SET(dw, field, val); }) dw 96 drivers/infiniband/hw/hfi1/user_sdma.h u8 dw, u8 bit, u8 width, u16 value) dw 100 drivers/infiniband/hw/hfi1/user_sdma.h arr[idx++] = sdma_build_ahg_descriptor(value, dw, bit, width); dw 3410 drivers/infiniband/hw/qib/qib_iba7220.c u32 dw, i, hcnt, dcnt, *data; dw 3428 drivers/infiniband/hw/qib/qib_iba7220.c dw = (__force u32) cpu_to_be32(hdr[i]); dw 3429 drivers/infiniband/hw/qib/qib_iba7220.c hdr[i] = dw; dw 3432 drivers/infiniband/hw/qib/qib_iba7220.c dw = (__force u32) cpu_to_be32(madpayload_start[i]); dw 3433 drivers/infiniband/hw/qib/qib_iba7220.c madpayload_start[i] = dw; dw 3434 drivers/infiniband/hw/qib/qib_iba7220.c dw = (__force u32) cpu_to_be32(madpayload_done[i]); dw 3435 drivers/infiniband/hw/qib/qib_iba7220.c madpayload_done[i] = dw; dw 5261 drivers/infiniband/hw/qib/qib_iba7322.c u32 dw, i, hcnt, dcnt, *data; dw 5279 drivers/infiniband/hw/qib/qib_iba7322.c dw = (__force u32) cpu_to_be32(hdr[i]); dw 5280 drivers/infiniband/hw/qib/qib_iba7322.c hdr[i] = dw; dw 5283 drivers/infiniband/hw/qib/qib_iba7322.c dw = (__force u32) cpu_to_be32(madpayload_start[i]); dw 5284 drivers/infiniband/hw/qib/qib_iba7322.c madpayload_start[i] = dw; dw 5285 drivers/infiniband/hw/qib/qib_iba7322.c dw = (__force u32) cpu_to_be32(madpayload_done[i]); dw 5286 drivers/infiniband/hw/qib/qib_iba7322.c madpayload_done[i] = dw; dw 567 drivers/infiniband/hw/qib/qib_sdma.c u32 dw; dw 570 drivers/infiniband/hw/qib/qib_sdma.c dw = (len + 3) >> 2; dw 572 drivers/infiniband/hw/qib/qib_sdma.c dw << 2, DMA_TO_DEVICE); dw 578 drivers/infiniband/hw/qib/qib_sdma.c make_sdma_desc(ppd, sdmadesc, (u64) addr, dw, dwoffset); dw 593 drivers/infiniband/hw/qib/qib_sdma.c dwoffset += dw; dw 594 drivers/infiniband/hw/qib/qib_sdma.c dwords -= dw; dw 86 drivers/input/touchscreen/pcap_ts.c struct delayed_work *dw = to_delayed_work(work); dw 87 drivers/input/touchscreen/pcap_ts.c struct pcap_ts *pcap_ts = container_of(dw, struct pcap_ts, work); dw 1337 drivers/iommu/dmar.c u8 dw = 0, dr = 0; dw 1343 drivers/iommu/dmar.c dw = 1; dw 1348 drivers/iommu/dmar.c desc.qw0 = QI_IOTLB_DID(did) | QI_IOTLB_DR(dr) | QI_IOTLB_DW(dw) dw 2157 drivers/md/raid10.c int dw = r10_bio->devs[1].devnum; dw 2177 drivers/md/raid10.c rdev = conf->mirrors[dw].rdev; dw 2199 drivers/md/raid10.c if (rdev != conf->mirrors[dw].rdev) { dw 2201 drivers/md/raid10.c struct md_rdev *rdev2 = conf->mirrors[dw].rdev; dw 2209 drivers/md/raid10.c conf->mirrors[dw].recovery_disabled dw 607 drivers/media/platform/exynos-gsc/gsc-core.c int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, dw 619 drivers/media/platform/exynos-gsc/gsc-core.c tmp_h = dw; dw 621 drivers/media/platform/exynos-gsc/gsc-core.c tmp_w = dw; dw 398 drivers/media/platform/exynos-gsc/gsc-core.h int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, dw 193 drivers/media/platform/exynos4-is/fimc-core.c int dw, int dh, int rotation) dw 196 drivers/media/platform/exynos4-is/fimc-core.c swap(dw, dh); dw 199 drivers/media/platform/exynos4-is/fimc-core.c return (sw == dw && sh == dh) ? 0 : -EINVAL; dw 201 drivers/media/platform/exynos4-is/fimc-core.c if ((sw >= SCALER_MAX_HRATIO * dw) || (sh >= SCALER_MAX_VRATIO * dh)) dw 630 drivers/media/platform/exynos4-is/fimc-core.h int dw, int dh, int rotation); dw 1262 drivers/media/platform/pxa_camera.c unsigned long dw, bpp; dw 1275 drivers/media/platform/pxa_camera.c dw = 4; dw 1279 drivers/media/platform/pxa_camera.c dw = 3; dw 1288 drivers/media/platform/pxa_camera.c dw = 2; dw 1307 drivers/media/platform/pxa_camera.c cicr1 = CICR1_PPL_VAL(pcdev->current_pix.width - 1) | bpp | dw; dw 8070 drivers/message/fusion/mptbase.c } dw; dw 8078 drivers/message/fusion/mptbase.c if ((sas_loginfo.dw.bus_type != 3 /*SAS*/) && dw 8079 drivers/message/fusion/mptbase.c (sas_loginfo.dw.originator < ARRAY_SIZE(originator_str))) dw 8082 drivers/message/fusion/mptbase.c originator_desc = originator_str[sas_loginfo.dw.originator]; dw 8084 drivers/message/fusion/mptbase.c switch (sas_loginfo.dw.originator) { dw 8087 drivers/message/fusion/mptbase.c if (sas_loginfo.dw.code < dw 8089 drivers/message/fusion/mptbase.c code_desc = iop_code_str[sas_loginfo.dw.code]; dw 8092 drivers/message/fusion/mptbase.c if (sas_loginfo.dw.code < dw 8094 drivers/message/fusion/mptbase.c code_desc = pl_code_str[sas_loginfo.dw.code]; dw 8097 drivers/message/fusion/mptbase.c if (sas_loginfo.dw.code >= dw 8100 drivers/message/fusion/mptbase.c code_desc = ir_code_str[sas_loginfo.dw.code]; dw 8101 drivers/message/fusion/mptbase.c if (sas_loginfo.dw.subcode >= dw 8104 drivers/message/fusion/mptbase.c if (sas_loginfo.dw.code == 0) dw 8106 drivers/message/fusion/mptbase.c raid_sub_code_str[sas_loginfo.dw.subcode]; dw 8123 drivers/message/fusion/mptbase.c sas_loginfo.dw.subcode, MptCallbacksName[cb_idx]); dw 8129 drivers/message/fusion/mptbase.c sas_loginfo.dw.code, sas_loginfo.dw.subcode, dw 47 drivers/net/dsa/mv88e6xxx/ptp.c #define dw_overflow_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \ dw 49 drivers/net/dsa/mv88e6xxx/ptp.c #define dw_tai_event_to_chip(dw) container_of(dw, struct mv88e6xxx_chip, \ dw 154 drivers/net/dsa/mv88e6xxx/ptp.c struct delayed_work *dw = to_delayed_work(ugly); dw 155 drivers/net/dsa/mv88e6xxx/ptp.c struct mv88e6xxx_chip *chip = dw_tai_event_to_chip(dw); dw 438 drivers/net/dsa/mv88e6xxx/ptp.c struct delayed_work *dw = to_delayed_work(work); dw 439 drivers/net/dsa/mv88e6xxx/ptp.c struct mv88e6xxx_chip *chip = dw_overflow_to_chip(dw); dw 341 drivers/net/dsa/sja1105/sja1105_ptp.c struct delayed_work *dw = to_delayed_work(work); dw 342 drivers/net/dsa/sja1105/sja1105_ptp.c struct sja1105_private *priv = dw_to_sja1105(dw); dw 11700 drivers/net/ethernet/broadcom/bnxt/bnxt.c u32 dw; dw 11709 drivers/net/ethernet/broadcom/bnxt/bnxt.c pci_read_config_dword(pdev, pos, &dw); dw 11710 drivers/net/ethernet/broadcom/bnxt/bnxt.c put_unaligned_le32(dw, &dsn[0]); dw 11711 drivers/net/ethernet/broadcom/bnxt/bnxt.c pci_read_config_dword(pdev, pos + 4, &dw); dw 11712 drivers/net/ethernet/broadcom/bnxt/bnxt.c put_unaligned_le32(dw, &dsn[4]); dw 773 drivers/net/ethernet/davicom/dm9000.c struct delayed_work *dw = to_delayed_work(w); dw 774 drivers/net/ethernet/davicom/dm9000.c struct board_info *db = container_of(dw, struct board_info, phy_poll); dw 844 drivers/net/ethernet/emulex/benet/be.h u32 *dw = (u32 *) ptr + dw_offset; dw 845 drivers/net/ethernet/emulex/benet/be.h *dw &= ~(mask << offset); dw 846 drivers/net/ethernet/emulex/benet/be.h *dw |= (mask & value) << offset; dw 858 drivers/net/ethernet/emulex/benet/be.h u32 *dw = (u32 *) ptr; dw 859 drivers/net/ethernet/emulex/benet/be.h return mask & (*(dw + dw_offset) >> offset); dw 885 drivers/net/ethernet/emulex/benet/be.h u32 *dw = wrb; dw 888 drivers/net/ethernet/emulex/benet/be.h *dw = cpu_to_le32(*dw); dw 889 drivers/net/ethernet/emulex/benet/be.h dw++; dw 248 drivers/net/ethernet/emulex/benet/be_hw.h __le32 dw[4]; dw 288 drivers/net/ethernet/emulex/benet/be_hw.h u32 dw[4]; dw 370 drivers/net/ethernet/emulex/benet/be_hw.h u32 dw[4]; dw 1231 drivers/net/ethernet/emulex/benet/be_main.c if (!(hdr->dw[2] & cpu_to_le32(TX_HDR_WRB_EVT))) dw 1232 drivers/net/ethernet/emulex/benet/be_main.c hdr->dw[2] |= cpu_to_le32(TX_HDR_WRB_EVT | TX_HDR_WRB_COMPL); dw 1240 drivers/net/ethernet/emulex/benet/be_main.c hdr->dw[2] &= ~cpu_to_le32(TX_HDR_WRB_NUM_MASK << dw 1242 drivers/net/ethernet/emulex/benet/be_main.c hdr->dw[2] |= cpu_to_le32((txo->last_req_wrb_cnt + 1) << dw 2539 drivers/net/ethernet/emulex/benet/be_main.c if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0) dw 2570 drivers/net/ethernet/emulex/benet/be_main.c compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0; dw 2715 drivers/net/ethernet/emulex/benet/be_main.c if (compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0) dw 2743 drivers/net/ethernet/emulex/benet/be_main.c compl->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0; dw 1249 drivers/net/ethernet/intel/iavf/iavf_main.c u32 *dw; dw 1252 drivers/net/ethernet/intel/iavf/iavf_main.c dw = (u32 *)adapter->rss_key; dw 1254 drivers/net/ethernet/intel/iavf/iavf_main.c wr32(hw, IAVF_VFQF_HKEY(i), dw[i]); dw 1256 drivers/net/ethernet/intel/iavf/iavf_main.c dw = (u32 *)adapter->rss_lut; dw 1258 drivers/net/ethernet/intel/iavf/iavf_main.c wr32(hw, IAVF_VFQF_HLUT(i), dw[i]); dw 712 drivers/net/ethernet/jme.c rxdesc->dw[0] = 0; dw 713 drivers/net/ethernet/jme.c rxdesc->dw[1] = 0; dw 1456 drivers/net/ethernet/jme.c txdesc[(i + j) & (mask)].dw[0] = 0; dw 1990 drivers/net/ethernet/jme.c txdesc->dw[0] = 0; dw 1991 drivers/net/ethernet/jme.c txdesc->dw[1] = 0; dw 2147 drivers/net/ethernet/jme.c txdesc->dw[0] = 0; dw 2148 drivers/net/ethernet/jme.c txdesc->dw[1] = 0; dw 2149 drivers/net/ethernet/jme.c txdesc->dw[2] = 0; dw 2150 drivers/net/ethernet/jme.c txdesc->dw[3] = 0; dw 171 drivers/net/ethernet/jme.h __le32 dw[4]; dw 266 drivers/net/ethernet/jme.h __le32 dw[4]; dw 31 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c struct delayed_work dw; dw 811 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c mlxsw_core_schedule_dw(&acl->rule_activity_update.dw, dw 818 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c rule_activity_update.dw.work); dw 894 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c INIT_DELAYED_WORK(&acl->rule_activity_update.dw, dw 897 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c mlxsw_core_schedule_dw(&acl->rule_activity_update.dw, 0); dw 916 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c cancel_delayed_work_sync(&mlxsw_sp->acl->rule_activity_update.dw); dw 215 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c struct delayed_work dw; dw 742 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c mlxsw_core_schedule_dw(&vregion->rehash.dw, dw 755 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c rehash.dw.work); dw 763 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c mlxsw_core_schedule_dw(&vregion->rehash.dw, 0); dw 835 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c INIT_DELAYED_WORK(&vregion->rehash.dw, dw 866 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c cancel_delayed_work_sync(&vregion->rehash.dw); dw 904 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c mlxsw_core_schedule_dw(&vregion->rehash.dw, 0); dw 906 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.c cancel_delayed_work_sync(&vregion->rehash.dw); dw 65 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c struct delayed_work dw; dw 2301 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c mlxsw_core_schedule_dw(&mlxsw_sp->router->neighs_update.dw, dw 2311 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c neighs_update.dw.work); dw 2639 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c INIT_DELAYED_WORK(&mlxsw_sp->router->neighs_update.dw, dw 2643 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c mlxsw_core_schedule_dw(&mlxsw_sp->router->neighs_update.dw, 0); dw 2650 drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c cancel_delayed_work_sync(&mlxsw_sp->router->neighs_update.dw); dw 31 drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c struct delayed_work dw; dw 2725 drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c mlxsw_core_schedule_dw(&bridge->fdb_notify.dw, dw 2742 drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c bridge = container_of(work, struct mlxsw_sp_bridge, fdb_notify.dw.work); dw 3503 drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c INIT_DELAYED_WORK(&bridge->fdb_notify.dw, mlxsw_sp_fdb_notify_work); dw 3517 drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c cancel_delayed_work_sync(&mlxsw_sp->bridge->fdb_notify.dw); dw 2985 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c u8 dw, rows, cols, banks, ranks; dw 3007 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = NETXEN_DIMM_DATAWIDTH(val); dw 3059 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c switch (dw) { dw 3061 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 32; dw 3064 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 33; dw 3067 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 36; dw 3070 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 64; dw 3073 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 72; dw 3076 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 80; dw 3079 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 128; dw 3082 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dw = 144; dw 3085 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c netdev_err(netdev, "Invalid data-width %x\n", dw); dw 3089 drivers/net/ethernet/qlogic/netxen/netxen_nic_main.c dimm.size = ((1 << rows) * (1 << cols) * dw * banks * ranks) / 8; dw 1643 drivers/net/ethernet/realtek/r8169_main.c u32 *dw = p; dw 1648 drivers/net/ethernet/realtek/r8169_main.c memcpy_fromio(dw++, data++, 4); dw 632 drivers/net/team/team.c team = container_of(work, struct team, notify_peers.dw.work); dw 635 drivers/net/team/team.c schedule_delayed_work(&team->notify_peers.dw, 0); dw 646 drivers/net/team/team.c schedule_delayed_work(&team->notify_peers.dw, dw 655 drivers/net/team/team.c schedule_delayed_work(&team->notify_peers.dw, 0); dw 660 drivers/net/team/team.c INIT_DELAYED_WORK(&team->notify_peers.dw, team_notify_peers_work); dw 665 drivers/net/team/team.c cancel_delayed_work_sync(&team->notify_peers.dw); dw 678 drivers/net/team/team.c team = container_of(work, struct team, mcast_rejoin.dw.work); dw 681 drivers/net/team/team.c schedule_delayed_work(&team->mcast_rejoin.dw, 0); dw 692 drivers/net/team/team.c schedule_delayed_work(&team->mcast_rejoin.dw, dw 701 drivers/net/team/team.c schedule_delayed_work(&team->mcast_rejoin.dw, 0); dw 706 drivers/net/team/team.c INIT_DELAYED_WORK(&team->mcast_rejoin.dw, team_mcast_rejoin_work); dw 711 drivers/net/team/team.c cancel_delayed_work_sync(&team->mcast_rejoin.dw); dw 1227 drivers/net/wireless/intel/iwlegacy/4965.c tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); dw 352 drivers/net/wireless/intel/iwlegacy/commands.h u32 dw; dw 363 drivers/net/wireless/intel/iwlegacy/commands.h __le32 dw; dw 1386 drivers/net/wireless/intel/iwlegacy/commands.h __le32 dw[2]; dw 334 drivers/net/wireless/intel/iwlwifi/dvm/commands.h __le32 dw; dw 1419 drivers/net/wireless/mediatek/mt76/mt7615/mcu.c wtbl_raw->dw = 5; dw 362 drivers/net/wireless/mediatek/mt76/mt7615/mcu.h u8 dw; dw 243 drivers/pci/controller/pcie-altera.c u32 dw[4]; dw 251 drivers/pci/controller/pcie-altera.c dw[0] = cra_readl(pcie, S10_RP_RXCPL_REG); dw 265 drivers/pci/controller/pcie-altera.c while (count < ARRAY_SIZE(dw)) { dw 267 drivers/pci/controller/pcie-altera.c dw[count++] = cra_readl(pcie, S10_RP_RXCPL_REG); dw 269 drivers/pci/controller/pcie-altera.c comp_status = TLP_COMP_STATUS(dw[1]); dw 273 drivers/pci/controller/pcie-altera.c if (value && TLP_BYTE_COUNT(dw[1]) == sizeof(u32) && dw 275 drivers/pci/controller/pcie-altera.c *value = dw[3]; dw 1100 drivers/pci/probe.c u32 dw; dw 1112 drivers/pci/probe.c pci_read_config_dword(dev, offset, &dw); dw 1113 drivers/pci/probe.c ea_sec = dw & PCI_EA_SEC_BUS_MASK; dw 1114 drivers/pci/probe.c ea_sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT; dw 173 drivers/s390/scsi/zfcp_fc.c struct delayed_work *dw = to_delayed_work(work); dw 175 drivers/s390/scsi/zfcp_fc.c container_of(dw, struct zfcp_fc_wka_port, work); dw 786 drivers/s390/scsi/zfcp_fc.c struct delayed_work *dw = to_delayed_work(work); dw 787 drivers/s390/scsi/zfcp_fc.c struct zfcp_adapter *adapter = container_of(dw, struct zfcp_adapter, dw 167 drivers/scsi/be2iscsi/be.h u32 *dw = (u32 *) ptr + dw_offset; dw 168 drivers/scsi/be2iscsi/be.h *dw &= ~(mask << offset); dw 169 drivers/scsi/be2iscsi/be.h *dw |= (mask & value) << offset; dw 181 drivers/scsi/be2iscsi/be.h u32 *dw = ptr; dw 182 drivers/scsi/be2iscsi/be.h return mask & (*(dw + dw_offset) >> offset); dw 196 drivers/scsi/be2iscsi/be.h u32 *dw = wrb; dw 199 drivers/scsi/be2iscsi/be.h *dw = cpu_to_le32(*dw); dw 200 drivers/scsi/be2iscsi/be.h dw++; dw 871 drivers/scsi/be2iscsi/be_cmds.h u32 dw[4]; dw 982 drivers/scsi/be2iscsi/be_cmds.h u32 dw[4]; dw 1201 drivers/scsi/be2iscsi/be_cmds.h u32 dw[32]; dw 681 drivers/scsi/be2iscsi/be_main.c while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] dw 683 drivers/scsi/be2iscsi/be_main.c if (((eqe->dw[offsetof(struct amap_eq_entry, dw 757 drivers/scsi/be2iscsi/be_main.c while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] dw 759 drivers/scsi/be2iscsi/be_main.c if (((eqe->dw[offsetof(struct amap_eq_entry, dw 1866 drivers/scsi/be2iscsi/be_main.c while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] & dw 1873 drivers/scsi/be2iscsi/be_main.c code = (sol->dw[offsetof(struct amap_sol_cqe, code) / 32] & dw 2050 drivers/scsi/be2iscsi/be_main.c while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] & dw 3605 drivers/scsi/be2iscsi/be_main.c while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] dw 423 drivers/scsi/be2iscsi/be_main.h u32 dw[12]; dw 492 drivers/scsi/be2iscsi/be_main.h u32 dw[4]; dw 510 drivers/scsi/be2iscsi/be_main.h u32 dw[6]; dw 617 drivers/scsi/be2iscsi/be_main.h u32 dw[4]; dw 660 drivers/scsi/be2iscsi/be_main.h u32 dw[1]; dw 676 drivers/scsi/be2iscsi/be_main.h u32 dw[1]; dw 695 drivers/scsi/be2iscsi/be_main.h u32 dw[16]; dw 703 drivers/scsi/be2iscsi/be_main.h (pwrb->dw[0] |= (wrb_type << type_offset)) dw 806 drivers/scsi/be2iscsi/be_main.h u32 dw[12]; dw 836 drivers/scsi/be2iscsi/be_main.h u32 dw[16]; dw 857 drivers/scsi/be2iscsi/be_main.h u32 dw[16]; dw 1290 drivers/scsi/be2iscsi/be_mgmt.c params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1297 drivers/scsi/be2iscsi/be_mgmt.c params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1300 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1303 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1306 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1309 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1312 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1316 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1322 drivers/scsi/be2iscsi/be_mgmt.c max_burst_length, pwrb, params->dw[offsetof dw 1360 drivers/scsi/be2iscsi/be_mgmt.c max_burst_length, pwrb, params->dw[offsetof dw 1380 drivers/scsi/be2iscsi/be_mgmt.c params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1384 drivers/scsi/be2iscsi/be_mgmt.c params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1388 drivers/scsi/be2iscsi/be_mgmt.c params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1393 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1396 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1399 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1403 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1406 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1411 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1417 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1422 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 1427 drivers/scsi/be2iscsi/be_mgmt.c (params->dw[offsetof(struct amap_beiscsi_offload_params, dw 526 drivers/scsi/cxlflash/sislite.h u64 dw; dw 553 drivers/scsi/cxlflash/superpipe.c rhte_f1->dw = dummy.dw; dw 707 drivers/scsi/cxlflash/superpipe.c rhte_f1->dw = 0; dw 965 drivers/scsi/esas2r/esas2r_init.c u32 dw; dw 1060 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); dw 1061 drivers/scsi/esas2r/esas2r_init.c dw &= ~MU_ILC_ENABLE; dw 1062 drivers/scsi/esas2r/esas2r_init.c esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); dw 1063 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); dw 1064 drivers/scsi/esas2r/esas2r_init.c dw &= ~MU_OLC_ENABLE; dw 1065 drivers/scsi/esas2r/esas2r_init.c esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); dw 1100 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG); dw 1101 drivers/scsi/esas2r/esas2r_init.c dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST); dw 1103 drivers/scsi/esas2r/esas2r_init.c (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR)); dw 1104 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG); dw 1105 drivers/scsi/esas2r/esas2r_init.c dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE); dw 1107 drivers/scsi/esas2r/esas2r_init.c (dw | MU_OLIC_LIST_F0 | dw 1111 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); dw 1112 drivers/scsi/esas2r/esas2r_init.c dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK); dw 1113 drivers/scsi/esas2r/esas2r_init.c dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC dw 1115 drivers/scsi/esas2r/esas2r_init.c esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); dw 1116 drivers/scsi/esas2r/esas2r_init.c dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); dw 1117 drivers/scsi/esas2r/esas2r_init.c dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK); dw 1118 drivers/scsi/esas2r/esas2r_init.c dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT); dw 1119 drivers/scsi/esas2r/esas2r_init.c esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); dw 141 drivers/scsi/esas2r/esas2r_io.c u32 dw; dw 171 drivers/scsi/esas2r/esas2r_io.c dw = a->last_write; dw 174 drivers/scsi/esas2r/esas2r_io.c dw |= MU_ILW_TOGGLE; dw 177 drivers/scsi/esas2r/esas2r_io.c esas2r_trace("dw:%x", dw); dw 179 drivers/scsi/esas2r/esas2r_io.c esas2r_write_register_dword(a, MU_IN_LIST_WRITE, dw); dw 1140 drivers/scsi/mpt3sas/mpt3sas_base.c } dw; dw 1146 drivers/scsi/mpt3sas/mpt3sas_base.c if (sas_loginfo.dw.bus_type != 3 /*SAS*/) dw 1158 drivers/scsi/mpt3sas/mpt3sas_base.c switch (sas_loginfo.dw.originator) { dw 1175 drivers/scsi/mpt3sas/mpt3sas_base.c originator_str, sas_loginfo.dw.code, sas_loginfo.dw.subcode); dw 1878 drivers/scsi/mvsas/mv_sas.c struct delayed_work *dw = container_of(work, struct delayed_work, work); dw 1879 drivers/scsi/mvsas/mv_sas.c struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); dw 347 drivers/scsi/ncr53c8xx.h #define cpu_to_scr(dw) cpu_to_le32(dw) dw 348 drivers/scsi/ncr53c8xx.h #define scr_to_cpu(dw) le32_to_cpu(dw) dw 352 drivers/scsi/ncr53c8xx.h #define cpu_to_scr(dw) cpu_to_be32(dw) dw 353 drivers/scsi/ncr53c8xx.h #define scr_to_cpu(dw) be32_to_cpu(dw) dw 357 drivers/scsi/ncr53c8xx.h #define cpu_to_scr(dw) (dw) dw 358 drivers/scsi/ncr53c8xx.h #define scr_to_cpu(dw) (dw) dw 3356 drivers/scsi/qla2xxx/qla_init.c uint32_t dw; dw 3369 drivers/scsi/qla2xxx/qla_init.c rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); dw 3376 drivers/scsi/qla2xxx/qla_init.c if (dc == (dw & MPS_MASK)) dw 3379 drivers/scsi/qla2xxx/qla_init.c dw &= ~MPS_MASK; dw 3380 drivers/scsi/qla2xxx/qla_init.c dw |= dc; dw 3381 drivers/scsi/qla2xxx/qla_init.c rval = qla2x00_write_ram_word(vha, 0x7a15, dw); dw 128 drivers/scsi/sym53c8xx_2/sym_glue.h #define cpu_to_scr(dw) cpu_to_le32(dw) dw 129 drivers/scsi/sym53c8xx_2/sym_glue.h #define scr_to_cpu(dw) le32_to_cpu(dw) dw 536 drivers/staging/axis-fifo/axis-fifo.c static irqreturn_t axis_fifo_irq(int irq, void *dw) dw 538 drivers/staging/axis-fifo/axis-fifo.c struct axis_fifo *fifo = (struct axis_fifo *)dw; dw 545 drivers/staging/emxx_udc/emxx_udc.c buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ); dw 562 drivers/staging/emxx_udc/emxx_udc.c temp_32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ); dw 591 drivers/staging/emxx_udc/emxx_udc.c _nbu2ss_writel(&udc->p_regs->EP0_WRITE, p_buf_32->dw); dw 612 drivers/staging/emxx_udc/emxx_udc.c _nbu2ss_ep_in_end(udc, 0, temp_32.dw, i_remain_size); dw 872 drivers/staging/emxx_udc/emxx_udc.c p_buf_32->dw = dw 883 drivers/staging/emxx_udc/emxx_udc.c temp_32.dw = dw 1076 drivers/staging/emxx_udc/emxx_udc.c , p_buf_32->dw dw 1087 drivers/staging/emxx_udc/emxx_udc.c temp_32.dw = 0; dw 1091 drivers/staging/emxx_udc/emxx_udc.c _nbu2ss_ep_in_end(udc, ep->epnum, temp_32.dw, data); dw 590 drivers/staging/emxx_udc/emxx_udc.h unsigned int dw; dw 986 drivers/staging/greybus/audio_topology.c struct snd_soc_dapm_widget *dw, dw 1063 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1068 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1075 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1080 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget)SND_SOC_DAPM_OUTPUT(w->name); dw 1083 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget)SND_SOC_DAPM_INPUT(w->name); dw 1086 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1094 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1101 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1108 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1115 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1123 drivers/staging/greybus/audio_topology.c *dw = (struct snd_soc_dapm_widget) dw 1135 drivers/staging/greybus/audio_topology.c dev_dbg(module->dev, "%s: widget of type %d created\n", dw->name, dw 1136 drivers/staging/greybus/audio_topology.c dw->id); dw 437 drivers/staging/wusbcore/devconnect.c struct delayed_work *dw = to_delayed_work(ws); dw 438 drivers/staging/wusbcore/devconnect.c struct wusbhc *wusbhc = container_of(dw, struct wusbhc, keep_alive_timer); dw 12 drivers/video/fbdev/mb862xx/mb862xxfb.h unsigned short dw; dw 327 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c if (l1_cfg->dh == 0 || l1_cfg->dw == 0) dw 329 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c if ((l1_cfg->sw >= l1_cfg->dw) && (l1_cfg->sh >= l1_cfg->dh)) { dw 333 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c (l1_cfg->sw << 11) / l1_cfg->dw)); dw 336 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c } else if ((l1_cfg->sw <= l1_cfg->dw) && dw 341 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c (l1_cfg->sw << 11) / l1_cfg->dw)); dw 345 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c pack(l1_cfg->dw >> 1, l1_cfg->dh)); dw 353 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c l1em |= l1_cfg->dw * 2 - 8; dw 374 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c pack(l1_cfg->dh - 1, l1_cfg->dw)); dw 529 drivers/video/fbdev/mb862xx/mb862xxfbdrv.c par->l1_cfg.dw = 720; dw 4040 drivers/video/fbdev/omap2/omapfb/dss/dsi.c u16 dw, dh; dw 4049 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dw = dsi->timings.x_res; dw 4053 drivers/video/fbdev/omap2/omapfb/dss/dsi.c dsi->update_bytes = dw * dh * dw 143 drivers/video/fbdev/omap2/omapfb/dss/overlay.c u16 dw, dh; dw 145 drivers/video/fbdev/omap2/omapfb/dss/overlay.c dw = mgr_timings->x_res; dw 163 drivers/video/fbdev/omap2/omapfb/dss/overlay.c if (dw < info->pos_x + outw) { dw 166 drivers/video/fbdev/omap2/omapfb/dss/overlay.c ovl->id, info->pos_x, outw, dw); dw 282 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c u16 dw, dh; dw 290 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c display->driver->get_resolution(display, &dw, &dh); dw 292 drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c if (x + w > dw || y + h > dh) dw 127 drivers/video/fbdev/savage/savagefb.h #define BCI_SEND(dw) writel(dw, par->bci_base + par->bci_ptr++) dw 61 drivers/xen/xen-pciback/conf_space.c if (field->u.dw.read) dw 62 drivers/xen/xen-pciback/conf_space.c ret = field->u.dw.read(dev, offset, value, entry->data); dw 87 drivers/xen/xen-pciback/conf_space.c if (field->u.dw.write) dw 88 drivers/xen/xen-pciback/conf_space.c ret = field->u.dw.write(dev, offset, value, dw 48 drivers/xen/xen-pciback/conf_space.h } dw; dw 88 drivers/xen/xen-pciback/conf_space_capability.c .u.dw.read = xen_pcibk_read_config_dword, dw 89 drivers/xen/xen-pciback/conf_space_capability.c .u.dw.write = NULL, dw 365 drivers/xen/xen-pciback/conf_space_header.c .u.dw.read = bar_read, \ dw 366 drivers/xen/xen-pciback/conf_space_header.c .u.dw.write = bar_write, \ dw 376 drivers/xen/xen-pciback/conf_space_header.c .u.dw.read = bar_read, \ dw 377 drivers/xen/xen-pciback/conf_space_header.c .u.dw.write = rom_write, \ dw 79 drivers/xen/xen-pciback/conf_space_quirks.c field->u.dw.read = xen_pcibk_read_config_dword; dw 80 drivers/xen/xen-pciback/conf_space_quirks.c field->u.dw.write = xen_pcibk_write_config_dword; dw 4094 fs/cifs/smb2ops.c struct smb2_decrypt_work *dw = container_of(work, dw 4099 fs/cifs/smb2ops.c rc = decrypt_raw_data(dw->server, dw->buf, dw->server->vals->read_rsp_size, dw 4100 fs/cifs/smb2ops.c dw->ppages, dw->npages, dw->len); dw 4106 fs/cifs/smb2ops.c dw->server->lstrp = jiffies; dw 4107 fs/cifs/smb2ops.c mid = smb2_find_mid(dw->server, dw->buf); dw 4112 fs/cifs/smb2ops.c rc = handle_read_data(dw->server, mid, dw->buf, dw 4113 fs/cifs/smb2ops.c dw->server->vals->read_rsp_size, dw 4114 fs/cifs/smb2ops.c dw->ppages, dw->npages, dw->len); dw 4120 fs/cifs/smb2ops.c for (i = dw->npages-1; i >= 0; i--) dw 4121 fs/cifs/smb2ops.c put_page(dw->ppages[i]); dw 4123 fs/cifs/smb2ops.c kfree(dw->ppages); dw 4124 fs/cifs/smb2ops.c cifs_small_buf_release(dw->buf); dw 4125 fs/cifs/smb2ops.c kfree(dw); dw 4141 fs/cifs/smb2ops.c struct smb2_decrypt_work *dw; dw 4186 fs/cifs/smb2ops.c dw = kmalloc(sizeof(struct smb2_decrypt_work), GFP_KERNEL); dw 4187 fs/cifs/smb2ops.c if (dw == NULL) dw 4190 fs/cifs/smb2ops.c dw->buf = server->smallbuf; dw 4193 fs/cifs/smb2ops.c INIT_WORK(&dw->decrypt, smb2_decrypt_offload); dw 4195 fs/cifs/smb2ops.c dw->npages = npages; dw 4196 fs/cifs/smb2ops.c dw->server = server; dw 4197 fs/cifs/smb2ops.c dw->ppages = pages; dw 4198 fs/cifs/smb2ops.c dw->len = len; dw 4199 fs/cifs/smb2ops.c queue_work(decrypt_wq, &dw->decrypt); dw 84 include/drm/drm_rect.h static inline void drm_rect_adjust_size(struct drm_rect *r, int dw, int dh) dw 86 include/drm/drm_rect.h r->x1 -= dw >> 1; dw 88 include/drm/drm_rect.h r->x2 += (dw + 1) >> 1; dw 36 include/linux/dma/dw.h struct dw_dma *dw; dw 28 include/linux/dma/edma.h struct dw_edma *dw; dw 218 include/linux/if_team.h struct delayed_work dw; dw 224 include/linux/if_team.h struct delayed_work dw; dw 327 include/linux/intel-iommu.h #define QI_IOTLB_DW(dw) (((u64)dw) << 6) dw 1900 mm/vmstat.c struct delayed_work *dw = &per_cpu(vmstat_work, cpu); dw 1902 mm/vmstat.c if (!delayed_work_pending(dw) && need_update(cpu)) dw 1903 mm/vmstat.c queue_delayed_work_on(cpu, mm_percpu_wq, dw, 0);