dte_data         1930 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				   struct si_dte_data *dte_data)
dte_data         1934 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 k = dte_data->k;
dte_data         1935 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 t_max = dte_data->max_t;
dte_data         1937 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	u32 t_0 = dte_data->t0;
dte_data         1941 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_data->tdep_count = 3;
dte_data         1944 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			dte_data->r[i] =
dte_data         1949 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_data->tdep_r[1] = dte_data->r[4] * 2;
dte_data         1952 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			dte_data->tdep_r[i] = dte_data->r[4];
dte_data         1991 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_pi->dte_data = dte_data_tahiti;
dte_data         1995 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data.enable_dte_by_default = true;
dte_data         1998 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_new_zealand;
dte_data         2004 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_aruba_pro;
dte_data         2008 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_malta;
dte_data         2012 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_tahiti_pro;
dte_data         2016 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			if (si_pi->dte_data.enable_dte_by_default == true)
dte_data         2029 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_curacao_xt;
dte_data         2034 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_curacao_pro;
dte_data         2039 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_neptune_xt;
dte_data         2043 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_pitcairn;
dte_data         2057 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2061 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_sun_xt;
dte_data         2067 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2072 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2076 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2080 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_venus_xtx;
dte_data         2084 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_venus_xt;
dte_data         2091 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_venus_pro;
dte_data         2095 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2102 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_pi->dte_data = dte_data_mars_pro;
dte_data         2134 drivers/gpu/drm/amd/amdgpu/si_dpm.c 			si_pi->dte_data = dte_data_oland;
dte_data         2142 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		si_pi->dte_data = dte_data_sun_xt;
dte_data         2157 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (si_pi->dte_data.enable_dte_by_default) {
dte_data         2160 drivers/gpu/drm/amd/amdgpu/si_dpm.c 				si_update_dte_from_pl2(adev, &si_pi->dte_data);
dte_data         2569 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	struct si_dte_data *dte_data = &si_pi->dte_data;
dte_data         2575 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (dte_data == NULL)
dte_data         2581 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	if (dte_data->k <= 0)
dte_data         2590 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	table_size = dte_data->k;
dte_data         2595 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	tdep_count = dte_data->tdep_count;
dte_data         2600 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->T0 = cpu_to_be32(dte_data->t0);
dte_data         2601 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->MaxT = cpu_to_be32(dte_data->max_t);
dte_data         2602 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->WindowSize = dte_data->window_size;
dte_data         2603 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->temp_select = dte_data->temp_select;
dte_data         2604 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->DTE_mode = dte_data->dte_mode;
dte_data         2605 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	dte_tables->Tthreshold = cpu_to_be32(dte_data->t_threshold);
dte_data         2611 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_tables->tau[i] = cpu_to_be32(dte_data->tau[i]);
dte_data         2612 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_tables->R[i]   = cpu_to_be32(dte_data->r[i]);
dte_data         2618 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_tables->T_limits[i] = dte_data->t_limits[i];
dte_data         2619 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_tables->Tdep_tau[i] = cpu_to_be32(dte_data->tdep_tau[i]);
dte_data         2620 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		dte_tables->Tdep_R[i] = cpu_to_be32(dte_data->tdep_r[i]);
dte_data         1000 drivers/gpu/drm/amd/amdgpu/si_dpm.h 	struct si_dte_data dte_data;
dte_data         1839 drivers/gpu/drm/radeon/si_dpm.c 				   struct si_dte_data *dte_data)
dte_data         1843 drivers/gpu/drm/radeon/si_dpm.c 	u32 k = dte_data->k;
dte_data         1844 drivers/gpu/drm/radeon/si_dpm.c 	u32 t_max = dte_data->max_t;
dte_data         1846 drivers/gpu/drm/radeon/si_dpm.c 	u32 t_0 = dte_data->t0;
dte_data         1850 drivers/gpu/drm/radeon/si_dpm.c 		dte_data->tdep_count = 3;
dte_data         1853 drivers/gpu/drm/radeon/si_dpm.c 			dte_data->r[i] =
dte_data         1858 drivers/gpu/drm/radeon/si_dpm.c 		dte_data->tdep_r[1] = dte_data->r[4] * 2;
dte_data         1861 drivers/gpu/drm/radeon/si_dpm.c 			dte_data->tdep_r[i] = dte_data->r[4];
dte_data         1879 drivers/gpu/drm/radeon/si_dpm.c 		si_pi->dte_data = dte_data_tahiti;
dte_data         1883 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data.enable_dte_by_default = true;
dte_data         1886 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_new_zealand;
dte_data         1892 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_aruba_pro;
dte_data         1896 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_malta;
dte_data         1900 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_tahiti_pro;
dte_data         1904 drivers/gpu/drm/radeon/si_dpm.c 			if (si_pi->dte_data.enable_dte_by_default == true)
dte_data         1916 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_curacao_xt;
dte_data         1925 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_curacao_pro;
dte_data         1934 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_neptune_xt;
dte_data         1942 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_pitcairn;
dte_data         1956 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         1960 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_sun_xt;
dte_data         1966 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         1971 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         1975 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         1979 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_venus_xtx;
dte_data         1983 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_venus_xt;
dte_data         1990 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_venus_pro;
dte_data         1994 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_cape_verde;
dte_data         2007 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_mars_pro;
dte_data         2018 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_mars_pro;
dte_data         2028 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_mars_pro;
dte_data         2036 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_mars_pro;
dte_data         2044 drivers/gpu/drm/radeon/si_dpm.c 			si_pi->dte_data = dte_data_oland;
dte_data         2052 drivers/gpu/drm/radeon/si_dpm.c 		si_pi->dte_data = dte_data_sun_xt;
dte_data         2067 drivers/gpu/drm/radeon/si_dpm.c 		if (si_pi->dte_data.enable_dte_by_default) {
dte_data         2070 drivers/gpu/drm/radeon/si_dpm.c 				si_update_dte_from_pl2(rdev, &si_pi->dte_data);
dte_data         2473 drivers/gpu/drm/radeon/si_dpm.c 	struct si_dte_data *dte_data = &si_pi->dte_data;
dte_data         2479 drivers/gpu/drm/radeon/si_dpm.c 	if (dte_data == NULL)
dte_data         2485 drivers/gpu/drm/radeon/si_dpm.c 	if (dte_data->k <= 0)
dte_data         2494 drivers/gpu/drm/radeon/si_dpm.c 	table_size = dte_data->k;
dte_data         2499 drivers/gpu/drm/radeon/si_dpm.c 	tdep_count = dte_data->tdep_count;
dte_data         2504 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->T0 = cpu_to_be32(dte_data->t0);
dte_data         2505 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->MaxT = cpu_to_be32(dte_data->max_t);
dte_data         2506 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->WindowSize = dte_data->window_size;
dte_data         2507 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->temp_select = dte_data->temp_select;
dte_data         2508 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->DTE_mode = dte_data->dte_mode;
dte_data         2509 drivers/gpu/drm/radeon/si_dpm.c 	dte_tables->Tthreshold = cpu_to_be32(dte_data->t_threshold);
dte_data         2515 drivers/gpu/drm/radeon/si_dpm.c 		dte_tables->tau[i] = cpu_to_be32(dte_data->tau[i]);
dte_data         2516 drivers/gpu/drm/radeon/si_dpm.c 		dte_tables->R[i]   = cpu_to_be32(dte_data->r[i]);
dte_data         2522 drivers/gpu/drm/radeon/si_dpm.c 		dte_tables->T_limits[i] = dte_data->t_limits[i];
dte_data         2523 drivers/gpu/drm/radeon/si_dpm.c 		dte_tables->Tdep_tau[i] = cpu_to_be32(dte_data->tdep_tau[i]);
dte_data         2524 drivers/gpu/drm/radeon/si_dpm.c 		dte_tables->Tdep_R[i] = cpu_to_be32(dte_data->tdep_r[i]);
dte_data          193 drivers/gpu/drm/radeon/si_dpm.h 	struct si_dte_data dte_data;