dte               243 arch/mips/include/asm/netlogic/xlp-hal/pic.h 	int sch, int vec, int dt, int db, int dte)
dte               250 arch/mips/include/asm/netlogic/xlp-hal/pic.h 			(dte & 0xffff);
dte              3683 drivers/iommu/amd_iommu.c 	u64 dte;
dte              3685 drivers/iommu/amd_iommu.c 	dte	= amd_iommu_dev_table[devid].data[2];
dte              3686 drivers/iommu/amd_iommu.c 	dte	&= ~DTE_IRQ_PHYS_ADDR_MASK;
dte              3687 drivers/iommu/amd_iommu.c 	dte	|= iommu_virt_to_phys(table->table);
dte              3688 drivers/iommu/amd_iommu.c 	dte	|= DTE_IRQ_REMAP_INTCTL;
dte              3689 drivers/iommu/amd_iommu.c 	dte	|= DTE_IRQ_TABLE_LEN;
dte              3690 drivers/iommu/amd_iommu.c 	dte	|= DTE_IRQ_REMAP_ENABLE;
dte              3692 drivers/iommu/amd_iommu.c 	amd_iommu_dev_table[devid].data[2] = dte;
dte               177 drivers/iommu/rockchip-iommu.c static inline phys_addr_t rk_dte_pt_address(u32 dte)
dte               179 drivers/iommu/rockchip-iommu.c 	return (phys_addr_t)dte & RK_DTE_PT_ADDRESS_MASK;
dte               182 drivers/iommu/rockchip-iommu.c static inline bool rk_dte_is_pt_valid(u32 dte)
dte               184 drivers/iommu/rockchip-iommu.c 	return dte & RK_DTE_PT_VALID;
dte               480 drivers/iommu/rockchip-iommu.c 	u32 dte;
dte               496 drivers/iommu/rockchip-iommu.c 	dte = *dte_addr;
dte               498 drivers/iommu/rockchip-iommu.c 	if (!rk_dte_is_pt_valid(dte))
dte               501 drivers/iommu/rockchip-iommu.c 	pte_addr_phys = rk_dte_pt_address(dte) + (pte_index * 4);
dte               515 drivers/iommu/rockchip-iommu.c 		&mmu_dte_addr_phys, &dte_addr_phys, dte,
dte               516 drivers/iommu/rockchip-iommu.c 		rk_dte_is_pt_valid(dte), &pte_addr_phys, pte,
dte               595 drivers/iommu/rockchip-iommu.c 	u32 dte, pte;
dte               600 drivers/iommu/rockchip-iommu.c 	dte = rk_domain->dt[rk_iova_dte_index(iova)];
dte               601 drivers/iommu/rockchip-iommu.c 	if (!rk_dte_is_pt_valid(dte))
dte               604 drivers/iommu/rockchip-iommu.c 	pt_phys = rk_dte_pt_address(dte);
dte               659 drivers/iommu/rockchip-iommu.c 	u32 dte_index, dte;
dte               667 drivers/iommu/rockchip-iommu.c 	dte = *dte_addr;
dte               668 drivers/iommu/rockchip-iommu.c 	if (rk_dte_is_pt_valid(dte))
dte               682 drivers/iommu/rockchip-iommu.c 	dte = rk_mk_dte(pt_dma);
dte               683 drivers/iommu/rockchip-iommu.c 	*dte_addr = dte;
dte               689 drivers/iommu/rockchip-iommu.c 	pt_phys = rk_dte_pt_address(dte);
dte               804 drivers/iommu/rockchip-iommu.c 	u32 dte;
dte               817 drivers/iommu/rockchip-iommu.c 	dte = rk_domain->dt[rk_iova_dte_index(iova)];
dte               819 drivers/iommu/rockchip-iommu.c 	if (!rk_dte_is_pt_valid(dte)) {
dte               824 drivers/iommu/rockchip-iommu.c 	pt_phys = rk_dte_pt_address(dte);
dte              1038 drivers/iommu/rockchip-iommu.c 		u32 dte = rk_domain->dt[i];
dte              1039 drivers/iommu/rockchip-iommu.c 		if (rk_dte_is_pt_valid(dte)) {
dte              1040 drivers/iommu/rockchip-iommu.c 			phys_addr_t pt_phys = rk_dte_pt_address(dte);
dte               119 drivers/net/wan/wanxl.c 	const char *cable, *pm, *dte = "", *dsr = "", *dcd = "";
dte               146 drivers/net/wan/wanxl.c 		dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE";
dte               149 drivers/net/wan/wanxl.c 		    pm, dte, cable, dsr, dcd);
dte              2067 drivers/pinctrl/tegra/pinctrl-tegra20.c 	MUX_PG(dte,    RSVD1,     RSVD2,     VI,        SPI1,          0x14, 15, 0x84, 30, 0xa0, 26),
dte               266 net/x25/x25_facilities.c 		struct x25_facilities *new, struct x25_dte_facilities *dte)
dte               275 net/x25/x25_facilities.c 	memset(dte, 0, sizeof(*dte));
dte               277 net/x25/x25_facilities.c 	len = x25_parse_facilities(skb, &theirs, dte, &x25->vc_facil_mask);