dst_offset 726 arch/s390/kernel/time.c static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); dst_offset 6820 arch/x86/kvm/svm.c int dst_offset; dst_offset 6837 arch/x86/kvm/svm.c dst_offset = dst_paddr & 15; dst_offset 6840 arch/x86/kvm/svm.c memcpy(page_address(dst_tpage) + dst_offset, dst_offset 6843 arch/x86/kvm/svm.c if (copy_from_user(page_address(dst_tpage) + dst_offset, dst_offset 584 crypto/af_alg.c size_t dst_offset) dst_offset 609 crypto/af_alg.c if (dst_offset >= plen) { dst_offset 611 crypto/af_alg.c dst_offset -= plen; dst_offset 616 crypto/af_alg.c plen - dst_offset, dst_offset 617 crypto/af_alg.c sg[i].offset + dst_offset); dst_offset 618 crypto/af_alg.c dst_offset = 0; dst_offset 252 drivers/block/ps3vram.c unsigned int src_offset, unsigned int dst_offset, dst_offset 260 drivers/block/ps3vram.c ps3vram_out_ring(priv, dst_offset); dst_offset 284 drivers/block/ps3vram.c unsigned int src_offset, unsigned int dst_offset, dst_offset 292 drivers/block/ps3vram.c ps3vram_out_ring(priv, XDR_IOIF + dst_offset); dst_offset 368 drivers/crypto/ccp/ccp-dmaengine.c unsigned int dst_offset, dst_len; dst_offset 389 drivers/crypto/ccp/ccp-dmaengine.c dst_offset = 0; dst_offset 416 drivers/crypto/ccp/ccp-dmaengine.c dst_offset = 0; dst_offset 435 drivers/crypto/ccp/ccp-dmaengine.c ccp_pt->dst_dma = sg_dma_address(dst_sg) + dst_offset; dst_offset 454 drivers/crypto/ccp/ccp-dmaengine.c dst_offset += len; dst_offset 245 drivers/crypto/ccree/cc_aead.c u32 skip = areq->cryptlen + areq_ctx->dst_offset; dst_offset 791 drivers/crypto/ccree/cc_aead.c areq_ctx->dst_offset : areq_ctx->src_offset; dst_offset 859 drivers/crypto/ccree/cc_aead.c areq_ctx->dst_offset), dst_offset 92 drivers/crypto/ccree/cc_aead.h unsigned int dst_offset; dst_offset 782 drivers/crypto/ccree/cc_buffer_mgr.c areq_ctx->dst_offset, is_last_table, dst_offset 810 drivers/crypto/ccree/cc_buffer_mgr.c areq_ctx->dst_offset, is_last_table, dst_offset 935 drivers/crypto/ccree/cc_buffer_mgr.c areq_ctx->dst_offset = offset; dst_offset 80 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h uint64_t dst_offset, dst_offset 95 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h uint64_t dst_offset, dst_offset 1964 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c uint64_t dst_offset, uint32_t byte_count, dst_offset 2012 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dst_offset, cur_size_in_bytes); dst_offset 2015 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c dst_offset += cur_size_in_bytes; dst_offset 87 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h uint64_t dst_offset, uint32_t byte_count, dst_offset 1315 drivers/gpu/drm/amd/amdgpu/cik_sdma.c uint64_t dst_offset, dst_offset 1323 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1324 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1339 drivers/gpu/drm/amd/amdgpu/cik_sdma.c uint64_t dst_offset, dst_offset 1343 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1344 drivers/gpu/drm/amd/amdgpu/cik_sdma.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1202 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c uint64_t dst_offset, dst_offset 1211 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1212 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1227 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c uint64_t dst_offset, dst_offset 1231 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1232 drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1640 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c uint64_t dst_offset, dst_offset 1649 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1650 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1665 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c uint64_t dst_offset, dst_offset 1669 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1670 drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 2462 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint64_t dst_offset, dst_offset 2471 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 2472 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 2487 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c uint64_t dst_offset, dst_offset 2491 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 2492 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1681 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c uint64_t dst_offset, dst_offset 1690 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1691 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 1706 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c uint64_t dst_offset, dst_offset 1710 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 1711 drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); dst_offset 777 drivers/gpu/drm/amd/amdgpu/si_dma.c uint64_t dst_offset, dst_offset 782 drivers/gpu/drm/amd/amdgpu/si_dma.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 784 drivers/gpu/drm/amd/amdgpu/si_dma.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset) & 0xff; dst_offset 800 drivers/gpu/drm/amd/amdgpu/si_dma.c uint64_t dst_offset, dst_offset 805 drivers/gpu/drm/amd/amdgpu/si_dma.c ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); dst_offset 807 drivers/gpu/drm/amd/amdgpu/si_dma.c ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset) << 16; dst_offset 161 drivers/gpu/drm/gma500/accel_2d.c uint32_t src_format, uint32_t dst_offset, dst_offset 199 drivers/gpu/drm/gma500/accel_2d.c *buf++ = dst_offset; dst_offset 206 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c u64 src_offset, dst_offset; dst_offset 233 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c dst_offset = dst->node.start; dst_offset 244 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c *cmd++ = lower_32_bits(dst_offset); dst_offset 245 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c *cmd++ = upper_32_bits(dst_offset); dst_offset 255 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c *cmd++ = lower_32_bits(dst_offset); dst_offset 256 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c *cmd++ = upper_32_bits(dst_offset); dst_offset 265 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c *cmd++ = dst_offset; dst_offset 274 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c dst_offset += size; dst_offset 788 drivers/gpu/drm/nouveau/nouveau_bo.c u64 dst_offset = mem->vma[1].addr; dst_offset 803 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, upper_32_bits(dst_offset)); dst_offset 804 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, lower_32_bits(dst_offset)); dst_offset 814 drivers/gpu/drm/nouveau/nouveau_bo.c dst_offset += (PAGE_SIZE * line_count); dst_offset 826 drivers/gpu/drm/nouveau/nouveau_bo.c u64 dst_offset = mem->vma[1].addr; dst_offset 839 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, upper_32_bits(dst_offset)); dst_offset 840 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, lower_32_bits(dst_offset)); dst_offset 853 drivers/gpu/drm/nouveau/nouveau_bo.c dst_offset += (PAGE_SIZE * line_count); dst_offset 865 drivers/gpu/drm/nouveau/nouveau_bo.c u64 dst_offset = mem->vma[1].addr; dst_offset 880 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, upper_32_bits(dst_offset)); dst_offset 881 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, lower_32_bits(dst_offset)); dst_offset 891 drivers/gpu/drm/nouveau/nouveau_bo.c dst_offset += (PAGE_SIZE * line_count); dst_offset 956 drivers/gpu/drm/nouveau/nouveau_bo.c u64 dst_offset = mem->vma[1].addr; dst_offset 1001 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, upper_32_bits(dst_offset)); dst_offset 1004 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, lower_32_bits(dst_offset)); dst_offset 1016 drivers/gpu/drm/nouveau/nouveau_bo.c dst_offset += amount; dst_offset 1050 drivers/gpu/drm/nouveau/nouveau_bo.c u32 dst_offset = new_reg->start << PAGE_SHIFT; dst_offset 1073 drivers/gpu/drm/nouveau/nouveau_bo.c OUT_RING (chan, dst_offset); dst_offset 1085 drivers/gpu/drm/nouveau/nouveau_bo.c dst_offset += (PAGE_SIZE * line_count); dst_offset 77 drivers/gpu/drm/qxl/qxl_ioctl.c uint32_t dst_offset; dst_offset 92 drivers/gpu/drm/qxl/qxl_ioctl.c reloc_page = qxl_bo_kmap_atomic_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); dst_offset 93 drivers/gpu/drm/qxl/qxl_ioctl.c *(uint64_t *)(reloc_page + (info->dst_offset & ~PAGE_MASK)) = qxl_bo_physical_address(qdev, dst_offset 108 drivers/gpu/drm/qxl/qxl_ioctl.c reloc_page = qxl_bo_kmap_atomic_page(qdev, info->dst_bo, info->dst_offset & PAGE_MASK); dst_offset 109 drivers/gpu/drm/qxl/qxl_ioctl.c *(uint32_t *)(reloc_page + (info->dst_offset & ~PAGE_MASK)) = id; dst_offset 232 drivers/gpu/drm/qxl/qxl_ioctl.c reloc_info[i].dst_offset = reloc.dst_offset; dst_offset 235 drivers/gpu/drm/qxl/qxl_ioctl.c reloc_info[i].dst_offset = reloc.dst_offset + release->release_offset; dst_offset 3660 drivers/gpu/drm/radeon/cik.c uint64_t src_offset, uint64_t dst_offset, dst_offset 3698 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, lower_32_bits(dst_offset)); dst_offset 3699 drivers/gpu/drm/radeon/cik.c radeon_ring_write(ring, upper_32_bits(dst_offset)); dst_offset 3702 drivers/gpu/drm/radeon/cik.c dst_offset += cur_size_in_bytes; dst_offset 580 drivers/gpu/drm/radeon/cik_sdma.c uint64_t src_offset, uint64_t dst_offset, dst_offset 616 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_write(ring, lower_32_bits(dst_offset)); dst_offset 617 drivers/gpu/drm/radeon/cik_sdma.c radeon_ring_write(ring, upper_32_bits(dst_offset)); dst_offset 619 drivers/gpu/drm/radeon/cik_sdma.c dst_offset += cur_size_in_bytes; dst_offset 2804 drivers/gpu/drm/radeon/evergreen_cs.c u64 src_offset, dst_offset, dst2_offset; dst_offset 2829 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2830 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 2837 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2838 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32; dst_offset 2848 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2850 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset, radeon_bo_size(dst_reloc->robj)); dst_offset 2871 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2872 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32; dst_offset 2878 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2880 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 2898 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx + 7); dst_offset 2899 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+8) & 0xff)) << 32; dst_offset 2909 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2910 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 2918 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2920 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 2930 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2931 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32; dst_offset 2937 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + count) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2939 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + count, radeon_bo_size(dst_reloc->robj)); dst_offset 2970 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2971 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+4) & 0xff)) << 32; dst_offset 2981 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2983 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 3010 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 3011 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 3021 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 3023 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 3072 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 3073 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 3083 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 3085 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 3109 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+7); dst_offset 3110 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+8) & 0xff)) << 32; dst_offset 3120 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 3121 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 3129 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 3131 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 3159 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 3160 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset <<= 8; dst_offset 3170 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 3172 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 3197 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 3198 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0x00ff0000)) << 16; dst_offset 3199 drivers/gpu/drm/radeon/evergreen_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 3201 drivers/gpu/drm/radeon/evergreen_cs.c dst_offset, radeon_bo_size(dst_reloc->robj)); dst_offset 109 drivers/gpu/drm/radeon/evergreen_dma.c uint64_t dst_offset, dst_offset 141 drivers/gpu/drm/radeon/evergreen_dma.c radeon_ring_write(ring, dst_offset & 0xfffffffc); dst_offset 143 drivers/gpu/drm/radeon/evergreen_dma.c radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); dst_offset 146 drivers/gpu/drm/radeon/evergreen_dma.c dst_offset += cur_size_in_dw * 4; dst_offset 892 drivers/gpu/drm/radeon/r100.c uint64_t dst_offset, dst_offset 943 drivers/gpu/drm/radeon/r100.c radeon_ring_write(ring, (pitch << 22) | (dst_offset >> 10)); dst_offset 85 drivers/gpu/drm/radeon/r200.c uint64_t dst_offset, dst_offset 115 drivers/gpu/drm/radeon/r200.c radeon_ring_write(ring, dst_offset); dst_offset 118 drivers/gpu/drm/radeon/r200.c dst_offset += cur_size; dst_offset 2964 drivers/gpu/drm/radeon/r600.c uint64_t src_offset, uint64_t dst_offset, dst_offset 3004 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, lower_32_bits(dst_offset)); dst_offset 3005 drivers/gpu/drm/radeon/r600.c radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); dst_offset 3008 drivers/gpu/drm/radeon/r600.c dst_offset += cur_size_in_bytes; dst_offset 2385 drivers/gpu/drm/radeon/r600_cs.c u64 src_offset, dst_offset; dst_offset 2408 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2409 drivers/gpu/drm/radeon/r600_cs.c dst_offset <<= 8; dst_offset 2414 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2415 drivers/gpu/drm/radeon/r600_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+2) & 0xff)) << 32; dst_offset 2421 drivers/gpu/drm/radeon/r600_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2423 drivers/gpu/drm/radeon/r600_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 2447 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+5); dst_offset 2448 drivers/gpu/drm/radeon/r600_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+6) & 0xff)) << 32; dst_offset 2458 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2459 drivers/gpu/drm/radeon/r600_cs.c dst_offset <<= 8; dst_offset 2467 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2468 drivers/gpu/drm/radeon/r600_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff)) << 32; dst_offset 2478 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2479 drivers/gpu/drm/radeon/r600_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0xff0000)) << 16; dst_offset 2493 drivers/gpu/drm/radeon/r600_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2495 drivers/gpu/drm/radeon/r600_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 2509 drivers/gpu/drm/radeon/r600_cs.c dst_offset = radeon_get_ib_value(p, idx+1); dst_offset 2510 drivers/gpu/drm/radeon/r600_cs.c dst_offset |= ((u64)(radeon_get_ib_value(p, idx+3) & 0x00ff0000)) << 16; dst_offset 2511 drivers/gpu/drm/radeon/r600_cs.c if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) { dst_offset 2513 drivers/gpu/drm/radeon/r600_cs.c dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj)); dst_offset 445 drivers/gpu/drm/radeon/r600_dma.c uint64_t src_offset, uint64_t dst_offset, dst_offset 477 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_write(ring, dst_offset & 0xfffffffc); dst_offset 479 drivers/gpu/drm/radeon/r600_dma.c radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) | dst_offset 482 drivers/gpu/drm/radeon/r600_dma.c dst_offset += cur_size_in_dw * 4; dst_offset 1913 drivers/gpu/drm/radeon/radeon.h uint64_t dst_offset, dst_offset 1919 drivers/gpu/drm/radeon/radeon.h uint64_t dst_offset, dst_offset 1926 drivers/gpu/drm/radeon/radeon.h uint64_t dst_offset, dst_offset 87 drivers/gpu/drm/radeon/radeon_asic.h uint64_t dst_offset, dst_offset 158 drivers/gpu/drm/radeon/radeon_asic.h uint64_t dst_offset, dst_offset 348 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 352 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 474 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 548 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 726 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 797 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 801 drivers/gpu/drm/radeon/radeon_asic.h uint64_t src_offset, uint64_t dst_offset, dst_offset 43 drivers/gpu/drm/radeon/rv770_dma.c uint64_t src_offset, uint64_t dst_offset, dst_offset 75 drivers/gpu/drm/radeon/rv770_dma.c radeon_ring_write(ring, dst_offset & 0xfffffffc); dst_offset 77 drivers/gpu/drm/radeon/rv770_dma.c radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); dst_offset 80 drivers/gpu/drm/radeon/rv770_dma.c dst_offset += cur_size_in_dw * 4; dst_offset 232 drivers/gpu/drm/radeon/si_dma.c uint64_t src_offset, uint64_t dst_offset, dst_offset 264 drivers/gpu/drm/radeon/si_dma.c radeon_ring_write(ring, lower_32_bits(dst_offset)); dst_offset 266 drivers/gpu/drm/radeon/si_dma.c radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); dst_offset 269 drivers/gpu/drm/radeon/si_dma.c dst_offset += cur_size_in_bytes; dst_offset 265 drivers/gpu/drm/tiny/gm12u320.c int block, dst_offset, len, remain, ret, x1, x2, y1, y2; dst_offset 304 drivers/gpu/drm/tiny/gm12u320.c dst_offset = (y1 * GM12U320_REAL_WIDTH + x1) * 3; dst_offset 305 drivers/gpu/drm/tiny/gm12u320.c block = dst_offset / DATA_BLOCK_CONTENT_SIZE; dst_offset 306 drivers/gpu/drm/tiny/gm12u320.c dst_offset %= DATA_BLOCK_CONTENT_SIZE; dst_offset 308 drivers/gpu/drm/tiny/gm12u320.c if ((dst_offset + len) > DATA_BLOCK_CONTENT_SIZE) { dst_offset 309 drivers/gpu/drm/tiny/gm12u320.c remain = dst_offset + len - DATA_BLOCK_CONTENT_SIZE; dst_offset 310 drivers/gpu/drm/tiny/gm12u320.c len = DATA_BLOCK_CONTENT_SIZE - dst_offset; dst_offset 313 drivers/gpu/drm/tiny/gm12u320.c dst_offset += DATA_BLOCK_HEADER_SIZE; dst_offset 317 drivers/gpu/drm/tiny/gm12u320.c gm12u320->data_buf[block] + dst_offset, dst_offset 322 drivers/gpu/drm/tiny/gm12u320.c dst_offset = DATA_BLOCK_HEADER_SIZE; dst_offset 324 drivers/gpu/drm/tiny/gm12u320.c gm12u320->data_buf[block] + dst_offset, dst_offset 486 drivers/gpu/drm/vc4/vc4_validate.c uint32_t dst_offset = 0; dst_offset 490 drivers/gpu/drm/vc4/vc4_validate.c void *dst_pkt = validated + dst_offset; dst_offset 530 drivers/gpu/drm/vc4/vc4_validate.c dst_offset += info->len; dst_offset 537 drivers/gpu/drm/vc4/vc4_validate.c exec->ct0ea = exec->ct0ca + dst_offset; dst_offset 357 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c u32 dst_offset, dst_offset 365 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c u32 dst_page = dst_offset >> PAGE_SHIFT; dst_offset 367 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c u32 dst_page_offset = dst_offset & ~PAGE_MASK; dst_offset 415 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c dst_offset += copy_size; dst_offset 446 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c u32 dst_offset, u32 dst_stride, dst_offset 456 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c u32 j, initial_line = dst_offset / dst_stride; dst_offset 492 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c diff->line_offset = dst_offset % dst_stride; dst_offset 493 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c ret = vmw_bo_cpu_blit_line(&d, dst_offset, src_offset, w); dst_offset 497 drivers/gpu/drm/vmwgfx/vmwgfx_blit.c dst_offset += dst_stride; dst_offset 1381 drivers/gpu/drm/vmwgfx/vmwgfx_drv.h u32 dst_offset, u32 dst_stride, dst_offset 580 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c u32 src_offset, dst_offset; dst_offset 595 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp; dst_offset 605 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c swap(src_offset, dst_offset); dst_offset 608 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, dst_offset 1297 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c u32 src_offset, dst_offset; dst_offset 1312 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp; dst_offset 1319 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo, dst_offset 176 drivers/media/platform/rockchip/rga/rga-hw.c struct rga_addr_offset *dst_offset; dst_offset 322 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset = rga_lookup_draw_pos(&offsets, src_info.data.rot_mode, dst_offset 340 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset->y_off; dst_offset 342 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset->u_off; dst_offset 344 drivers/media/platform/rockchip/rga/rga-hw.c dst_offset->v_off; dst_offset 33 drivers/misc/mic/scif/scif_dma.c s64 dst_offset; dst_offset 57 drivers/misc/mic/scif/scif_dma.c s64 dst_offset; dst_offset 851 drivers/misc/mic/scif/scif_dma.c scif_rma_local_cpu_copy(comp_cb->dst_offset, dst_offset 885 drivers/misc/mic/scif/scif_dma.c offset = work->dst_offset; dst_offset 1099 drivers/misc/mic/scif/scif_dma.c s64 src_offset = work->src_offset, dst_offset = work->dst_offset; dst_offset 1120 drivers/misc/mic/scif/scif_dma.c if (dst_offset == end_dst_offset) { dst_offset 1131 drivers/misc/mic/scif/scif_dma.c dst_dma_addr = scif_off_to_dma_addr(dst_window, dst_offset, dst_offset 1157 drivers/misc/mic/scif/scif_dma.c dst_offset += (loop_len - 1); dst_offset 1190 drivers/misc/mic/scif/scif_dma.c dst_offset += loop_len; dst_offset 1219 drivers/misc/mic/scif/scif_dma.c s64 src_offset = work->src_offset, dst_offset = work->dst_offset; dst_offset 1235 drivers/misc/mic/scif/scif_dma.c dst_dma_addr = __scif_off_to_dma_addr(dst_window, dst_offset); dst_offset 1246 drivers/misc/mic/scif/scif_dma.c dst_virt = _get_local_va(dst_offset, dst_window, dst_offset 1249 drivers/misc/mic/scif/scif_dma.c dst_virt = ioremap_remote(dst_offset, dst_window, dst_offset 1270 drivers/misc/mic/scif/scif_dma.c dst_offset += loop_len; dst_offset 1287 drivers/misc/mic/scif/scif_dma.c if (dst_offset == end_dst_offset) { dst_offset 1298 drivers/misc/mic/scif/scif_dma.c dst_dma_addr = scif_off_to_dma_addr(dst_window, dst_offset, dst_offset 1330 drivers/misc/mic/scif/scif_dma.c dst_offset += (loop_len - L1_CACHE_BYTES); dst_offset 1366 drivers/misc/mic/scif/scif_dma.c dst_offset += loop_len; dst_offset 1374 drivers/misc/mic/scif/scif_dma.c if (dst_offset == end_dst_offset) dst_offset 1378 drivers/misc/mic/scif/scif_dma.c dst_dma_addr = __scif_off_to_dma_addr(dst_window, dst_offset); dst_offset 1402 drivers/misc/mic/scif/scif_dma.c dst_virt = _get_local_va(dst_offset, dst_window, dst_offset 1405 drivers/misc/mic/scif/scif_dma.c dst_virt = ioremap_remote(dst_offset, dst_window, dst_offset 1445 drivers/misc/mic/scif/scif_dma.c s64 src_offset = work->src_offset, dst_offset = work->dst_offset; dst_offset 1459 drivers/misc/mic/scif/scif_dma.c dst_page_off = dst_offset & ~PAGE_MASK; dst_offset 1478 drivers/misc/mic/scif/scif_dma.c dst_virt = _get_local_va(dst_offset, dst_window, dst_offset 1481 drivers/misc/mic/scif/scif_dma.c dst_virt = ioremap_remote(dst_offset, dst_window, dst_offset 1510 drivers/misc/mic/scif/scif_dma.c dst_offset += loop_len; dst_offset 1522 drivers/misc/mic/scif/scif_dma.c if (dst_offset == end_dst_offset) { dst_offset 1538 drivers/misc/mic/scif/scif_dma.c s64 src_offset = work->src_offset, dst_offset = work->dst_offset; dst_offset 1548 drivers/misc/mic/scif/scif_dma.c dst_cache_off = dst_offset & (L1_CACHE_BYTES - 1); dst_offset 1591 drivers/misc/mic/scif/scif_dma.c comp_cb->dst_offset = work->dst_offset; dst_offset 1775 drivers/misc/mic/scif/scif_dma.c copy_work.dst_offset = roffset; dst_offset 1780 drivers/misc/mic/scif/scif_dma.c copy_work.dst_offset = loffset; dst_offset 397 drivers/misc/mic/scif/scif_rma.h static inline bool scif_unaligned(off_t src_offset, off_t dst_offset) dst_offset 400 drivers/misc/mic/scif/scif_rma.h dst_offset = dst_offset & (L1_CACHE_BYTES - 1); dst_offset 401 drivers/misc/mic/scif/scif_rma.h return !(src_offset == dst_offset); dst_offset 80 drivers/net/ethernet/amazon/ena/ena_eth_com.c u32 dst_offset; dst_offset 83 drivers/net/ethernet/amazon/ena/ena_eth_com.c dst_offset = dst_tail_mask * llq_info->desc_list_entry_size; dst_offset 102 drivers/net/ethernet/amazon/ena/ena_eth_com.c __iowrite64_copy(io_sq->desc_addr.pbuf_dev_addr + dst_offset, dst_offset 29 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_ctcam.c u16 src_offset, u16 dst_offset, u16 size) dst_offset 35 drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_ctcam.c region->tcam_region_info, dst_offset, size); dst_offset 383 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c unsigned int max_req_sz, src_offset, dst_offset; dst_offset 485 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c dst_offset = 0; dst_offset 491 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c req_sz = pkt_next->len - dst_offset; dst_offset 496 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c dst_data = pkt_next->data + dst_offset; dst_offset 504 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c dst_offset += req_sz; dst_offset 505 drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c if (dst_offset == pkt_next->len) dst_offset 4063 drivers/scsi/st.c int src_seg, dst_seg, src_offset = 0, dst_offset; dst_offset 4079 drivers/scsi/st.c for (dst_seg=dst_offset=0; total > 0; ) { dst_offset 4083 drivers/scsi/st.c count = min(length - dst_offset, length - src_offset); dst_offset 4084 drivers/scsi/st.c memmove(page_address(dpage) + dst_offset, dst_offset 4091 drivers/scsi/st.c dst_offset += count; dst_offset 4092 drivers/scsi/st.c if (dst_offset >= length) { dst_offset 4094 drivers/scsi/st.c dst_offset = 0; dst_offset 241 drivers/usb/isp1760/isp1760-hcd.c static void mem_writes8(void __iomem *dst_base, u32 dst_offset, dst_offset 246 drivers/usb/isp1760/isp1760-hcd.c dst = dst_base + dst_offset; dst_offset 248 drivers/usb/isp1760/isp1760-hcd.c if (dst_offset < PAYLOAD_OFFSET) { dst_offset 270 drivers/usb/isp1760/isp1760-hcd.c if (dst_offset < PAYLOAD_OFFSET) dst_offset 135 drivers/video/fbdev/fb-puv3.c int dst_offset = dst_y0 * dst_pitch + dst_x0 * (m_iBpp / 8); dst_offset 165 drivers/video/fbdev/fb-puv3.c writel(dst_offset, UGE_DSTSTART); dst_offset 225 drivers/video/fbdev/fb-puv3.c int dst_offset = dst_y0 * dst_pitch + dst_x0 * (m_iBpp / 8); dst_offset 249 drivers/video/fbdev/fb-puv3.c dst_offset = (dst_y0 + aheight) * dst_pitch + dst_offset 270 drivers/video/fbdev/fb-puv3.c writel(dst_offset, UGE_DSTSTART); dst_offset 441 drivers/video/fbdev/ps3fb.c u64 dst_offset, u64 src_offset, u32 width, dst_offset 455 drivers/video/fbdev/ps3fb.c status = lv1_gpu_fb_blit(ps3fb.context_handle, dst_offset, dst_offset 746 fs/btrfs/ctree.c struct extent_buffer *src, unsigned long dst_offset, dst_offset 777 fs/btrfs/ctree.c tm_list_add[i] = alloc_tree_mod_elem(dst, i + dst_offset, dst_offset 5799 fs/btrfs/extent_io.c unsigned long dst_offset, unsigned long src_offset, dst_offset 5808 fs/btrfs/extent_io.c unsigned long i = (start_offset + dst_offset) >> PAGE_SHIFT; dst_offset 5812 fs/btrfs/extent_io.c offset = offset_in_page(start_offset + dst_offset); dst_offset 5995 fs/btrfs/extent_io.c void memcpy_extent_buffer(struct extent_buffer *dst, unsigned long dst_offset, dst_offset 6012 fs/btrfs/extent_io.c if (dst_offset + len > dst->len) { dst_offset 6015 fs/btrfs/extent_io.c dst_offset, len, dst->len); dst_offset 6020 fs/btrfs/extent_io.c dst_off_in_page = offset_in_page(start_offset + dst_offset); dst_offset 6023 fs/btrfs/extent_io.c dst_i = (start_offset + dst_offset) >> PAGE_SHIFT; dst_offset 6035 fs/btrfs/extent_io.c dst_offset += cur; dst_offset 6040 fs/btrfs/extent_io.c void memmove_extent_buffer(struct extent_buffer *dst, unsigned long dst_offset, dst_offset 6047 fs/btrfs/extent_io.c unsigned long dst_end = dst_offset + len - 1; dst_offset 6059 fs/btrfs/extent_io.c if (dst_offset + len > dst->len) { dst_offset 6062 fs/btrfs/extent_io.c dst_offset, len, dst->len); dst_offset 6065 fs/btrfs/extent_io.c if (dst_offset < src_offset) { dst_offset 6066 fs/btrfs/extent_io.c memcpy_extent_buffer(dst, dst_offset, src_offset, len); dst_offset 471 fs/btrfs/extent_io.h unsigned long dst_offset, unsigned long src_offset, dst_offset 473 fs/btrfs/extent_io.h void memcpy_extent_buffer(struct extent_buffer *dst, unsigned long dst_offset, dst_offset 475 fs/btrfs/extent_io.h void memmove_extent_buffer(struct extent_buffer *dst, unsigned long dst_offset, dst_offset 3962 fs/btrfs/tree-log.c unsigned long dst_offset; dst_offset 3997 fs/btrfs/tree-log.c dst_offset = btrfs_item_ptr_offset(dst_path->nodes[0], dst_offset 4011 fs/btrfs/tree-log.c copy_extent_buffer(dst_path->nodes[0], src, dst_offset, dst_offset 1779 fs/ecryptfs/crypto.c size_t dst_offset = 0; dst_offset 1819 fs/ecryptfs/crypto.c dst[dst_offset++] = portable_filename_chars[dst_block[0]]; dst_offset 1820 fs/ecryptfs/crypto.c dst[dst_offset++] = portable_filename_chars[dst_block[1]]; dst_offset 1821 fs/ecryptfs/crypto.c dst[dst_offset++] = portable_filename_chars[dst_block[2]]; dst_offset 1822 fs/ecryptfs/crypto.c dst[dst_offset++] = portable_filename_chars[dst_block[3]]; dst_offset 839 fs/nfs/nfs42proc.c loff_t dst_offset, loff_t count) dst_offset 848 fs/nfs/nfs42proc.c .dst_offset = dst_offset, dst_offset 884 fs/nfs/nfs42proc.c loff_t src_offset, loff_t dst_offset, loff_t count) dst_offset 918 fs/nfs/nfs42proc.c src_offset, dst_offset, count); dst_offset 251 fs/nfs/nfs42xdr.c p = xdr_encode_hyper(p, args->dst_offset); dst_offset 227 include/crypto/if_alg.h size_t dst_offset); dst_offset 428 include/linux/nfs_xdr.h __u64 dst_offset; dst_offset 75 include/uapi/drm/qxl_drm.h __u64 dst_offset; /* offset in dest handle */ dst_offset 687 sound/core/oss/pcm_plugin.c int snd_pcm_area_silence(const struct snd_pcm_channel_area *dst_area, size_t dst_offset, dst_offset 697 sound/core/oss/pcm_plugin.c dst = dst_area->addr + (dst_area->first + dst_area->step * dst_offset) / 8; dst_offset 734 sound/core/oss/pcm_plugin.c const struct snd_pcm_channel_area *dst_area, size_t dst_offset, dst_offset 743 sound/core/oss/pcm_plugin.c return snd_pcm_area_silence(dst_area, dst_offset, samples, format); dst_offset 744 sound/core/oss/pcm_plugin.c dst = dst_area->addr + (dst_area->first + dst_area->step * dst_offset) / 8; dst_offset 134 sound/core/oss/pcm_plugin.h size_t dst_offset, dst_offset 139 sound/core/oss/pcm_plugin.h size_t dst_offset,