dst_h 692 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c u32 src_h = 1, dst_h = 1; dst_h 719 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_h = amdgpu_crtc->native_mode.hdisplay; dst_h 739 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); dst_h 748 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b.full = dfixed_const(dst_h); dst_h 204 drivers/gpu/drm/drm_rect.c int dst_h = drm_rect_height(dst); dst_h 205 drivers/gpu/drm/drm_rect.c int vscale = drm_calc_scale(src_h, dst_h); dst_h 207 drivers/gpu/drm/drm_rect.c if (vscale < 0 || dst_h == 0) dst_h 746 drivers/gpu/drm/exynos/exynos_drm_fimc.c u32 src_w, src_h, dst_w, dst_h; dst_h 759 drivers/gpu/drm/exynos/exynos_drm_fimc.c dst_h = dst->w; dst_h 762 drivers/gpu/drm/exynos/exynos_drm_fimc.c dst_h = dst->h; dst_h 772 drivers/gpu/drm/exynos/exynos_drm_fimc.c vfactor = fls(src_h / dst_h / 2); dst_h 786 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->vratio = (src_h << 14) / (dst_h << vfactor); dst_h 788 drivers/gpu/drm/exynos/exynos_drm_fimc.c sc->up_v = (dst_h >= src_h) ? true : false; dst_h 748 drivers/gpu/drm/exynos/exynos_drm_gsc.c u32 src_w, src_h, dst_w, dst_h; dst_h 756 drivers/gpu/drm/exynos/exynos_drm_gsc.c dst_h = dst->w; dst_h 759 drivers/gpu/drm/exynos/exynos_drm_gsc.c dst_h = dst->h; dst_h 768 drivers/gpu/drm/exynos/exynos_drm_gsc.c ret = gsc_get_ratio_shift(ctx, src_h, dst_h, &sc->pre_vratio); dst_h 778 drivers/gpu/drm/exynos/exynos_drm_gsc.c sc->main_vratio = (src_h << 16) / dst_h; dst_h 5410 drivers/gpu/drm/i915/display/intel_display.c int src_w, int src_h, int dst_w, int dst_h, dst_h 5426 drivers/gpu/drm/i915/display/intel_display.c if (src_w != dst_w || src_h != dst_h) dst_h 5473 drivers/gpu/drm/i915/display/intel_display.c dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H || dst_h 5476 drivers/gpu/drm/i915/display/intel_display.c dst_w > ICL_MAX_DST_W || dst_h > ICL_MAX_DST_H)) || dst_h 5479 drivers/gpu/drm/i915/display/intel_display.c dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H))) { dst_h 5482 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); dst_h 5490 drivers/gpu/drm/i915/display/intel_display.c intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, dst_h 11496 drivers/gpu/drm/i915/display/intel_display.c int dst_h = drm_rect_height(&state->base.dst); dst_h 11498 drivers/gpu/drm/i915/display/intel_display.c return (src_w != dst_w || src_h != dst_h); dst_h 4075 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; dst_h 4091 drivers/gpu/drm/i915/intel_pm.c dst_h = plane_state->base.crtc_h; dst_h 4101 drivers/gpu/drm/i915/intel_pm.c dst_h = drm_rect_height(&plane_state->base.dst); dst_h 4105 drivers/gpu/drm/i915/intel_pm.c fp_h_ratio = div_fixed16(src_h, dst_h); dst_h 4121 drivers/gpu/drm/i915/intel_pm.c u32 src_w, src_h, dst_w, dst_h; dst_h 4129 drivers/gpu/drm/i915/intel_pm.c dst_h = pfit_size & 0xffff; dst_h 4131 drivers/gpu/drm/i915/intel_pm.c if (!dst_w || !dst_h) dst_h 4135 drivers/gpu/drm/i915/intel_pm.c fp_h_ratio = div_fixed16(src_h, dst_h); dst_h 115 drivers/gpu/drm/meson/meson_plane.c int src_w, src_h, dst_w, dst_h; dst_h 202 drivers/gpu/drm/meson/meson_plane.c dst_h = state->crtc_h; dst_h 214 drivers/gpu/drm/meson/meson_plane.c dst_h /= 2; dst_h 218 drivers/gpu/drm/meson/meson_plane.c vf_phase_step = (src_h << 20) / dst_h; dst_h 228 drivers/gpu/drm/meson/meson_plane.c if (src_h != dst_h || src_w != dst_w) { dst_h 245 drivers/gpu/drm/meson/meson_plane.c if (src_h != dst_h) { dst_h 298 drivers/gpu/drm/meson/meson_plane.c priv->viu.osb_blend0_size = dst_h << 16 | dst_w; dst_h 299 drivers/gpu/drm/meson/meson_plane.c priv->viu.osb_blend1_size = dst_h << 16 | dst_w; dst_h 442 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, dst_h 455 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c mult_frac((1 << PHASE_STEP_SHIFT), src_h, dst_h); dst_h 487 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c if (!(DPU_FORMAT_IS_YUV(fmt)) && (src_h == dst_h) dst_h 492 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c scale_cfg->dst_height = dst_h; dst_h 1695 drivers/gpu/drm/radeon/radeon_display.c u32 src_h = 1, dst_h = 1; dst_h 1723 drivers/gpu/drm/radeon/radeon_display.c dst_h = radeon_crtc->native_mode.hdisplay; dst_h 1744 drivers/gpu/drm/radeon/radeon_display.c dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); dst_h 1766 drivers/gpu/drm/radeon/radeon_display.c b.full = dfixed_const(dst_h); dst_h 312 drivers/gpu/drm/rockchip/rockchip_drm_vop.c uint32_t dst_h, const struct drm_format_info *info) dst_h 337 drivers/gpu/drm/rockchip/rockchip_drm_vop.c scl_cal_scale2(src_h, dst_h)); dst_h 342 drivers/gpu/drm/rockchip/rockchip_drm_vop.c scl_cal_scale2(cbcr_src_h, dst_h)); dst_h 348 drivers/gpu/drm/rockchip/rockchip_drm_vop.c yrgb_ver_scl_mode = scl_get_scl_mode(src_h, dst_h); dst_h 352 drivers/gpu/drm/rockchip/rockchip_drm_vop.c cbcr_ver_scl_mode = scl_get_scl_mode(cbcr_src_h, dst_h); dst_h 384 drivers/gpu/drm/rockchip/rockchip_drm_vop.c val = scl_vop_cal_scale(yrgb_ver_scl_mode, src_h, dst_h, dst_h 401 drivers/gpu/drm/rockchip/rockchip_drm_vop.c dst_h, false, vsu_mode, &vskiplines); dst_h 320 drivers/gpu/drm/rockchip/rockchip_drm_vop.h static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h, dst_h 327 drivers/gpu/drm/rockchip/rockchip_drm_vop.h if (act_height == dst_h) dst_h 328 drivers/gpu/drm/rockchip/rockchip_drm_vop.h return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines; dst_h 330 drivers/gpu/drm/rockchip/rockchip_drm_vop.h return GET_SCL_FT_BILI_DN(act_height, dst_h); dst_h 192 drivers/gpu/drm/sti/sti_cursor.c int dst_x, dst_y, dst_w, dst_h; dst_h 204 drivers/gpu/drm/sti/sti_cursor.c dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y); dst_h 249 drivers/gpu/drm/sti/sti_cursor.c DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y); dst_h 626 drivers/gpu/drm/sti/sti_gdp.c int dst_x, dst_y, dst_w, dst_h; dst_h 640 drivers/gpu/drm/sti/sti_gdp.c dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); dst_h 690 drivers/gpu/drm/sti/sti_gdp.c dst_w, dst_h, dst_x, dst_y, dst_h 705 drivers/gpu/drm/sti/sti_gdp.c int dst_x, dst_y, dst_w, dst_h; dst_h 749 drivers/gpu/drm/sti/sti_gdp.c dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); dst_h 785 drivers/gpu/drm/sti/sti_gdp.c dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h); dst_h 787 drivers/gpu/drm/sti/sti_gdp.c yds = sti_vtg_get_line_number(*mode, dst_y + dst_h - 1); dst_h 480 drivers/gpu/drm/sti/sti_hqvdp.c int src_w, src_h, dst_w, dst_h; dst_h 520 drivers/gpu/drm/sti/sti_hqvdp.c dst_h = c->hvsrc.output_picture_size >> 16; dst_h 521 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, "\t%dx%d", dst_w, dst_h); dst_h 540 drivers/gpu/drm/sti/sti_hqvdp.c if (dst_h > src_h) dst_h 541 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " %d/1", dst_h / src_h); dst_h 543 drivers/gpu/drm/sti/sti_hqvdp.c seq_printf(s, " 1/%d", src_h / dst_h); dst_h 735 drivers/gpu/drm/sti/sti_hqvdp.c int dst_w, int dst_h) dst_h 743 drivers/gpu/drm/sti/sti_hqvdp.c inv_zy = DIV_ROUND_UP(src_h, dst_h); dst_h 1028 drivers/gpu/drm/sti/sti_hqvdp.c int dst_x, dst_y, dst_w, dst_h; dst_h 1040 drivers/gpu/drm/sti/sti_hqvdp.c dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); dst_h 1049 drivers/gpu/drm/sti/sti_hqvdp.c dst_w, dst_h)) { dst_h 1064 drivers/gpu/drm/sti/sti_hqvdp.c dst_h = ALIGN(dst_h, 2); dst_h 1069 drivers/gpu/drm/sti/sti_hqvdp.c (dst_h > MAX_HEIGHT) || (dst_h < MIN_HEIGHT)) { dst_h 1072 drivers/gpu/drm/sti/sti_hqvdp.c dst_w, dst_h); dst_h 1103 drivers/gpu/drm/sti/sti_hqvdp.c dst_w, dst_h, dst_x, dst_y, dst_h 1118 drivers/gpu/drm/sti/sti_hqvdp.c int dst_x, dst_y, dst_w, dst_h; dst_h 1147 drivers/gpu/drm/sti/sti_hqvdp.c dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); dst_h 1193 drivers/gpu/drm/sti/sti_hqvdp.c dst_h = ALIGN(dst_h, 2); dst_h 1197 drivers/gpu/drm/sti/sti_hqvdp.c cmd->hvsrc.output_picture_size = dst_h << 16 | dst_w; dst_h 1222 drivers/gpu/drm/sti/sti_hqvdp.c scale_v = SCALE_FACTOR * dst_h / src_h; dst_h 147 drivers/gpu/drm/sti/sti_vid.c int dst_h = clamp_val(state->crtc_h, 0, mode->vdisplay - dst_y); dst_h 154 drivers/gpu/drm/sti/sti_vid.c dst_h = ALIGN(dst_h, 2); dst_h 162 drivers/gpu/drm/sti/sti_vid.c yds = sti_vtg_get_line_number(*mode, dst_y + dst_h - 1); dst_h 80 drivers/gpu/drm/sun4i/sun8i_ui_layer.c u32 src_w, src_h, dst_w, dst_h; dst_h 94 drivers/gpu/drm/sun4i/sun8i_ui_layer.c dst_h = drm_rect_height(&state->dst); dst_h 100 drivers/gpu/drm/sun4i/sun8i_ui_layer.c outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); dst_h 107 drivers/gpu/drm/sun4i/sun8i_ui_layer.c dst_w, dst_h); dst_h 152 drivers/gpu/drm/sun4i/sun8i_ui_layer.c dst_h, hscale, vscale, hphase, vphase); dst_h 162 drivers/gpu/drm/sun4i/sun8i_ui_layer.c DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); dst_h 149 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, dst_h 167 drivers/gpu/drm/sun4i/sun8i_ui_scaler.c outsize = SUN8I_UI_SCALER_SIZE(dst_w, dst_h); dst_h 40 drivers/gpu/drm/sun4i/sun8i_ui_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, dst_h 74 drivers/gpu/drm/sun4i/sun8i_vi_layer.c u32 src_w, src_h, dst_w, dst_h; dst_h 91 drivers/gpu/drm/sun4i/sun8i_vi_layer.c dst_h = drm_rect_height(&state->dst); dst_h 116 drivers/gpu/drm/sun4i/sun8i_vi_layer.c outsize = SUN8I_MIXER_SIZE(dst_w, dst_h); dst_h 151 drivers/gpu/drm/sun4i/sun8i_vi_layer.c required = src_h * 100 / dst_h; dst_h 156 drivers/gpu/drm/sun4i/sun8i_vi_layer.c vn = (u32)ability * dst_h / 100; dst_h 171 drivers/gpu/drm/sun4i/sun8i_vi_layer.c vscale = (src_h << 16) / dst_h; dst_h 174 drivers/gpu/drm/sun4i/sun8i_vi_layer.c dst_h, hscale, vscale, hphase, vphase, dst_h 202 drivers/gpu/drm/sun4i/sun8i_vi_layer.c DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); dst_h 927 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, dst_h 943 drivers/gpu/drm/sun4i/sun8i_vi_scaler.c outsize = SUN8I_VI_SCALER_SIZE(dst_w, dst_h); dst_h 74 drivers/gpu/drm/sun4i/sun8i_vi_scaler.h u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, dst_h 148 drivers/gpu/drm/zte/zx_plane.c u32 src_w, u32 src_h, u32 dst_w, u32 dst_h) dst_h 157 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_DEST_CFG, RSZ_VER(dst_h - 1) | RSZ_HOR(dst_w - 1)); dst_h 174 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_VL_LUMA_VER, rsz_step_value(src_h, dst_h)); dst_h 176 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_VL_CHROMA_VER, rsz_step_value(src_chroma_h, dst_h)); dst_h 195 drivers/gpu/drm/zte/zx_plane.c u32 dst_x, dst_y, dst_w, dst_h; dst_h 213 drivers/gpu/drm/zte/zx_plane.c dst_h = drm_rect_height(dst); dst_h 234 drivers/gpu/drm/zte/zx_plane.c GL_POS_X(dst_x + dst_w) | GL_POS_Y(dst_y + dst_h)); dst_h 249 drivers/gpu/drm/zte/zx_plane.c zx_vl_rsz_setup(zplane, format, src_w, src_h, dst_w, dst_h); dst_h 339 drivers/gpu/drm/zte/zx_plane.c u32 dst_w, u32 dst_h) dst_h 344 drivers/gpu/drm/zte/zx_plane.c zx_writel(rsz + RSZ_DEST_CFG, RSZ_VER(dst_h - 1) | RSZ_HOR(dst_w - 1)); dst_h 359 drivers/gpu/drm/zte/zx_plane.c u32 dst_x, dst_y, dst_w, dst_h; dst_h 380 drivers/gpu/drm/zte/zx_plane.c dst_h = plane->state->crtc_h; dst_h 397 drivers/gpu/drm/zte/zx_plane.c GL_POS_X(dst_x + dst_w) | GL_POS_Y(dst_y + dst_h)); dst_h 413 drivers/gpu/drm/zte/zx_plane.c if (dst_h > 720) dst_h 425 drivers/gpu/drm/zte/zx_plane.c zx_gl_rsz_setup(zplane, src_w, src_h, dst_w, dst_h); dst_h 405 drivers/media/pci/ivtv/ivtv-driver.h u32 dst_h; dst_h 395 drivers/media/pci/ivtv/ivtv-yuv.c f->tru_h, f->src_h, f->dst_h, f->src_y, f->dst_y); dst_h 425 drivers/media/pci/ivtv/ivtv-yuv.c reg_2918 = (f->dst_h << 16) | (f->src_h + src_minor_y); dst_h 427 drivers/media/pci/ivtv/ivtv-yuv.c reg_2918 = (f->dst_h << 16) | ((f->src_h + src_minor_y) << 1); dst_h 430 drivers/media/pci/ivtv/ivtv-yuv.c reg_291c = (f->dst_h << 16) | ((f->src_h + src_minor_uv) >> 1); dst_h 432 drivers/media/pci/ivtv/ivtv-yuv.c reg_291c = (f->dst_h << 16) | (f->src_h + src_minor_uv); dst_h 434 drivers/media/pci/ivtv/ivtv-yuv.c reg_2964_base = (src_minor_y * ((f->dst_h << 16) / f->src_h)) >> 14; dst_h 435 drivers/media/pci/ivtv/ivtv-yuv.c reg_2968_base = (src_minor_uv * ((f->dst_h << 16) / f->src_h)) >> 14; dst_h 437 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_h / 2 >= f->src_h && !f->interlaced_y) { dst_h 438 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00400000) / f->dst_h; dst_h 439 drivers/media/pci/ivtv/ivtv-yuv.c if ((f->src_h * 0x00400000) - (master_height * f->dst_h) >= f->dst_h / 2) dst_h 448 drivers/media/pci/ivtv/ivtv-yuv.c } else if (f->dst_h >= f->src_h) { dst_h 449 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00400000) / f->dst_h; dst_h 465 drivers/media/pci/ivtv/ivtv-yuv.c } else if (f->dst_h >= f->src_h / 2) { dst_h 466 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00200000) / f->dst_h; dst_h 483 drivers/media/pci/ivtv/ivtv-yuv.c master_height = (f->src_h * 0x00100000) / f->dst_h; dst_h 496 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { dst_h 535 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { dst_h 538 drivers/media/pci/ivtv/ivtv-yuv.c reg_2964 = 2 + ((f->dst_h << 1) / f->src_h); dst_h 553 drivers/media/pci/ivtv/ivtv-yuv.c if ((reg_2964 != 0x00010001) && (f->dst_h / 2 <= f->src_h)) dst_h 565 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h == f->dst_h) { dst_h 571 drivers/media/pci/ivtv/ivtv-yuv.c v_filter_1 = ((f->src_h << 16) / f->dst_h) >> 15; dst_h 679 drivers/media/pci/ivtv/ivtv-yuv.c if (f->src_h / f->dst_h >= 2) { dst_h 684 drivers/media/pci/ivtv/ivtv-yuv.c if ((osd_crop = f->src_h - 4 * f->dst_h) > 0) { dst_h 688 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h = f->src_h / 4; dst_h 689 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h += f->dst_h & 1; dst_h 694 drivers/media/pci/ivtv/ivtv-yuv.c if ((int)f->dst_w <= 2 || (int)f->dst_h <= 2 || dst_h 700 drivers/media/pci/ivtv/ivtv-yuv.c osd_scale = (f->src_h << 16) / f->dst_h; dst_h 706 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h -= osd_crop; dst_h 712 drivers/media/pci/ivtv/ivtv-yuv.c if ((osd_crop = f->dst_h + f->dst_y - f->vis_h) > 0) { dst_h 714 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h -= osd_crop; dst_h 753 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h &= ~1; dst_h 760 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h &= ~1; dst_h 770 drivers/media/pci/ivtv/ivtv-yuv.c if (f->dst_h < f->src_h / 4) { dst_h 772 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h = f->src_h / 4; dst_h 773 drivers/media/pci/ivtv/ivtv-yuv.c f->dst_h += f->dst_h & 1; dst_h 777 drivers/media/pci/ivtv/ivtv-yuv.c if ((int)f->dst_w <= 2 || (int)f->dst_h <= 2 || dst_h 789 drivers/media/pci/ivtv/ivtv-yuv.c if ((of->src_h != f->src_h) || (of->dst_h != f->dst_h) || dst_h 985 drivers/media/pci/ivtv/ivtv-yuv.c nf->dst_h = args->dst.height; dst_h 1012 drivers/media/pci/ivtv/ivtv-yuv.c if (nf->tru_h < 1021 && (nf->dst_h >= nf->src_h / 2)) dst_h 1027 drivers/media/pci/ivtv/ivtv-yuv.c if (nf->tru_h < 1021 && (nf->dst_h >= nf->src_h / 2)) dst_h 847 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c int src_h, int dst_w, int dst_h, int rot) dst_h 852 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c tmp_w = dst_h; dst_h 856 drivers/media/platform/mtk-mdp/mtk_mdp_m2m.c tmp_h = dst_h; dst_h 166 drivers/media/platform/rockchip/rga/rga-hw.c unsigned int src_h, src_w, src_x, src_y, dst_h, dst_w, dst_x, dst_y; dst_h 184 drivers/media/platform/rockchip/rga/rga-hw.c dst_h = ctx->out.crop.height; dst_h 261 drivers/media/platform/rockchip/rga/rga-hw.c if (abs(src_w - dst_h) < 16) dst_h 266 drivers/media/platform/rockchip/rga/rga-hw.c scale_dst_w = dst_h; dst_h 269 drivers/media/platform/rockchip/rga/rga-hw.c scale_dst_h = dst_h; dst_h 309 drivers/media/platform/rockchip/rga/rga-hw.c dst_act_info.data.act_height = dst_h - 1; dst_h 321 drivers/media/platform/rockchip/rga/rga-hw.c offsets = rga_get_addr_offset(&ctx->out, dst_x, dst_y, dst_w, dst_h); dst_h 630 drivers/media/platform/sti/bdisp/bdisp-hw.c u32 src_w, src_h, dst_w, dst_h; dst_h 635 drivers/media/platform/sti/bdisp/bdisp-hw.c dst_h = ctx->dst.crop.height; dst_h 638 drivers/media/platform/sti/bdisp/bdisp-hw.c bdisp_hw_get_inc(src_h, dst_h, v_inc)) { dst_h 641 drivers/media/platform/sti/bdisp/bdisp-hw.c src_w, src_h, dst_w, dst_h); dst_h 111 drivers/media/platform/ti-vpe/sc.c unsigned int dst_h) dst_h 119 drivers/media/platform/ti-vpe/sc.c if (dst_h > src_h) { dst_h 121 drivers/media/platform/ti-vpe/sc.c } else if (dst_h == src_h) { dst_h 124 drivers/media/platform/ti-vpe/sc.c sixteenths = (dst_h << 4) / src_h; dst_h 149 drivers/media/platform/ti-vpe/sc.c unsigned int dst_w, unsigned int dst_h) dst_h 178 drivers/media/platform/ti-vpe/sc.c if (src_w == dst_w && src_h == dst_h) { dst_h 213 drivers/media/platform/ti-vpe/sc.c if (dst_h < (src_h >> 2)) { dst_h 222 drivers/media/platform/ti-vpe/sc.c factor = (u16) ((dst_h << 10) / src_h); dst_h 238 drivers/media/platform/ti-vpe/sc.c src_h, dst_h, factor, row_acc_init_rav, dst_h 242 drivers/media/platform/ti-vpe/sc.c row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); dst_h 247 drivers/media/platform/ti-vpe/sc.c src_h, dst_h, row_acc_inc); dst_h 258 drivers/media/platform/ti-vpe/sc.c (dst_h << CFG_TAR_H_SHIFT); dst_h 202 drivers/media/platform/ti-vpe/sc.h unsigned int dst_h); dst_h 205 drivers/media/platform/ti-vpe/sc.h unsigned int dst_w, unsigned int dst_h); dst_h 854 drivers/media/platform/ti-vpe/vpe.c unsigned int dst_h = d_q_data->c_rect.height; dst_h 899 drivers/media/platform/ti-vpe/vpe.c sc_set_vs_coeffs(ctx->dev->sc, ctx->sc_coeff_v.addr, src_h, dst_h); dst_h 903 drivers/media/platform/ti-vpe/vpe.c src_w, src_h, dst_w, dst_h); dst_h 2082 drivers/media/platform/ti-vpe/vpe.c unsigned int dst_h = d_q_data->c_rect.height; dst_h 2084 drivers/media/platform/ti-vpe/vpe.c if (src_w == dst_w && src_h == dst_h) dst_h 2089 drivers/media/platform/ti-vpe/vpe.c dst_h <= SC_MAX_PIXEL_HEIGHT &&